Semiconductor device and method for manufacturing the same

US12356650B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12356650-B2
Application numberUS-202217691057-A
CountryUS
Kind codeB2
Filing dateMar 9, 2022
Priority dateDec 31, 2021
Publication dateJul 8, 2025
Grant dateJul 8, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a gate electrode, a source electrode, a drain electrode, and a group of negatively-charged ions. The gate electrode is located between the source and drain electrodes to define a drift region between the gate and drain electrodes. A group of negatively-charged ions are implanted into the drift region and over the 2DEG region and spaced apart from the gate and drain electrodes and spaced apart from an area directly beneath the gate and drain electrodes. The gate electrode is closer to the negatively-charged ions than the drain electrode, such that the negatively-charged ions deplete at least one portion of the 2DEG region which is near the gate electrode.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device, comprising: a first nitride-based semiconductor layer; a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a bandgap greater than a bandgap of the first nitride-based semiconductor layer, so as to form a heterojunction therebetween with a two-dimensional electron gas (2DEG) region; a gate electrode disposed above the second nitride-based semiconductor layer; and a doped nitride-based semiconductor layer disposed between the second nitride-based semiconductor layer and the gate electrode; a source electrode and a drain electrode disposed above the second nitride-based semiconductor layer, wherein the gate electrode is located between the source and drain electrodes to define a drift region between the gate and drain electrodes; and a group of negatively-charged ions implanted into the drift region and over the 2DEG region and spaced apart from the gate and drain electrodes and spaced apart from areas directly beneath the gate electrode and the doped nitride-based semiconductor layer and the drain electrode, wherein the gate electrode and the doped nitride-based semiconductor layer are closer to the negatively-charged ions than the drain electrode, such that the negatively-charged ions deplete at least one portion of the 2DEG region which is near the gate electrode; wherein a distributed density of the group of negatively-charged ions in the second nitride-based semiconductor layer is non-uniform and increases and then decreases along a first direction pointing from a top surface to a bottom surface of the second nitride-based semiconductor layer. 2. The semiconductor device of claim 1 , wherein the gate electrode and the source and drain electrodes extend along a second direction, and the group of negatively-charged ions are distributed along the second direction to form a high resistivity strip in the drift region. 3. The semiconductor device of claim 1 , wherein the gate electrode and the source and drain electrodes extend along a second direction, and the group of negatively-charged ions are distributed along the second direction to form a plurality of high resistivity zones in the drift region. 4. The semiconductor device of claim 1 , wherein the group of negatively-charged ions are distributed from the top surface to the bottom surface of the second nitride-based semiconductor layer. 5. The semiconductor device of claim 1 , further comprising: a dielectric layer covering the gate electrode and the second nitride-based semiconductor layer, wherein the group of negatively-charged ions are adjacent with an interface formed between the second nitride-based semiconductor layer and the dielectric layer, and the source and drain electrodes penetrate the dielectric layer to make contact with the second nitride-based semiconductor layer. 6. The semiconductor device of claim 1 , wherein the semiconductor device does not include a field plate. 7. The semiconductor device of claim 1 , wherein the group of negatively-charged ions are dopants selected from a highly electronegative group. 8. The semiconductor device of claim 1 , wherein the group of negatively-charged ions include fluorine.

Assignees

Inventors

Classifications

  • into Group III-V semiconductors · CPC title

  • using masks · CPC title

  • of electrically active species · CPC title

  • of isolation regions comprising PN junctions · CPC title

  • Isolation regions comprising PN junctions · CPC title

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What does patent US12356650B2 cover?
A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a gate electrode, a source electrode, a drain electrode, and a group of negatively-charged ions. The gate electrode is located between the source and drain electrodes to define a drift region between the gate and drain electrodes. A group of negatively-charged ions are implante…
Who is the assignee on this patent?
Innoscience Suzhou Technology Holding Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W10/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 08 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).