Pixel driving circuit and display device

Patent metadata

Field	Value
Publication number	US-12354529-B2
Application number	US-202418415191-A
Country	US
Kind code	B2
Filing date	Jan 17, 2024
Priority date	Jun 28, 2018
Publication date	Jul 8, 2025
Grant date	Jul 8, 2025

Abstract

The present embodiments disclose a pixel. A pixel according to an embodiment of the present disclosure comprises a luminous element and a pixel circuit connected to the luminous element, wherein the pixel circuit include a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes constituting a single frame during a light-emitting period, a second pixel circuit configured to store bit values of image data in a data writing period and generate the control signal based on the bit values and a clock signal, a bias circuit configured to supply a driving power to the first pixel circuit, and a bias controller configured to generate a bias control signal for controlling the bias circuit and output the bias control signal to the bias circuit.

First claim

The invention claimed is:

1. A pixel comprising a luminous element and a pixel circuit connected to the luminous element,
wherein the pixel circuit includes:
a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes constituting a single frame during a light-emitting period;
a second pixel circuit configured to store bit values of image data in a data writing period and generate the control signal based on the bit values and a clock signal;
a bias circuit configured to supply a driving power to the first pixel circuit; and
a bias controller configured to generate a bias control signal for controlling the bias circuit and output the bias control signal to the bias circuit,
wherein the second pixel circuit is further configured to store bit values of bias control data, and the bias controller is configured to generate the bias control signal based on the bias control data,
wherein the bias control data defines a number of operations of the bias circuit in the single frame.

2. A pixel comprising a luminous element and a pixel circuit connected to the luminous element,
wherein the pixel circuit includes:
a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes constituting a single frame during a light-emitting period;
a second pixel circuit configured to store bit values of image data in a data writing period and generate the control signal based on the bit values of image data and a clock signal;
a bias circuit configured to supply a driving power to the first pixel circuit; and
a bias controller configured to generate a bias control signal for controlling the bias circuit and output the bias control signal to the bias circuit,
wherein the first pixel circuit includes a driver,
the driver includes a capacitor charged by the driving power, and
the bias controller configured to control the bias circuit such that the bias circuit stops supplying the driving power when the capacitor is charged with the driving power.

3. A pixel comprising a luminous element and a pixel circuit connected to the luminous element,
wherein the pixel circuit includes:
a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes constituting a single frame during a light-emitting period;
a second pixel circuit configured to store bit values of image data in a data writing period and generate the control signal based on the bit values and a clock signal;
a bias circuit configured to supply a driving power to the first pixel circuit; and
a bias controller configured to generate a bias control signal for controlling the bias circuit and output the bias control signal to the bias circuit,
wherein the first pixel circuit includes:
a first transistor configured to output a driving current; and
a second transistor configured to transmit or block the driving current to the luminous element according to the control signal,

wherein the second pixel circuit includes:
a memory configured to store the bit values of the image data; and
a pulse width modulation (PWM) controller configured to read the bit values of the image data from the memory and determine a pulse width of the control signal for a subframe based on a length of the subframe and a bit value corresponding to the subframe.

Assignees

• Sapien Semiconductors Inc

Inventors

• Jung Jun Young
• Lee Myunghee

Classifications

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2310/0289

  Details of voltage level shifters arranged for use in a driving circuit · CPC title

• G09G2300/08

  Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements · CPC title

• G09G2320/064

  by time modulation of the brightness of the illumination source · CPC title