Management of hot add in a testing environment for DUTs that are CXL protocol enabled

US12353306B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12353306-B2
Application numberUS-202318129381-A
CountryUS
Kind codeB2
Filing dateMar 31, 2023
Priority dateSep 21, 2022
Publication dateJul 8, 2025
Grant dateJul 8, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Efficient and effective testing systems and methods are presented. In one embodiment, a system includes: a user interface configured to enable user interaction with the system; a test board configured to communicatively couple with a plurality of devices under test (DUTs), wherein the DUTs are compute express link (CXL) protocol compliant; and a tester configured to direct testing of the plurality of DUTs, wherein the tester is configured to enable hot add of one of the plurality of DUTs without interfering with testing of the other DUTS. In one exemplary implementation, the DUTs are memory devices and the DUTs can operate as extended memory. An added DUT can be automatically recognized by a host in a way that is transparent to users (e.g., BIOS can direct detection of characteristics of an added DUT, etc.). The tester automatically can direct the hot add in response to a user trigger.

First claim

Opening claim text (preview).

The invention claimed is: 1. A system comprising: a user interface configured to enable user interaction with the system; a test board configured to communicatively couple with a plurality of devices under test (DUTs), wherein the DUTs are compute express link (CXL) protocol compliant; and a tester configured to direct testing of the plurality of DUTs, wherein the tester is configured to enable hot add of one of the plurality of DUTs without interfering with testing of other DUTs in the plurality of DUTs, wherein an automatic add management component and Direct Access Device (DAX) interfaces are at least partially included within the tester and respectively coupled to the plurality of DUTs, wherein an added one of the plurality of DUTs is automatically recognized by a host in a way that is transparent to users. 2. A system of claim 1 , wherein the DUTs are memory devices. 3. A system of claim 1 , wherein the user interface is utilized to indicate a pause to remove a DUT and to indicate a DUT has been added and to trigger a restart. 4. A system of claim 1 , wherein the tester automatically directs the hot add in response to a user trigger. 5. A system of claim 1 , wherein the DUTs operate as extended memory. 6. A system of claim 1 , wherein basic input/output system (BIOS) operations direct detection of characteristics associated with an added one of the plurality of DUTs. 7. A testing method comprising: receiving an indication associated with hot addition of a device under test (DUT), wherein testing of the DUT comprises compute express link (CXL) protocol communication with the DUT, and the DUT is included in a plurality of devices under test (DUTs); initiating a testing suspension process, wherein the testing suspension process suspends testing of the plurality of DUTs, wherein the testing suspension process is automatically performed in response to the receiving of the indication associated with the hot addition of the DUT, without interfering with other DUTs in the plurality of DUTs, and wherein the testing includes hot addition management and Direct Access (DAX) interfacing with the DUTs; receiving an indication to resume testing after hot add of the DUT to a test system; ending the testing suspension process, wherein ending the testing suspension process is automatically performed in response to the receiving of the indication to resume testing; and resuming testing of the plurality of DUTs. 8. A testing method of claim 7 , wherein operations associated the testing suspension process, including mounting and enumeration, are transparent to a user. 9. A testing method of claim 7 , wherein the hot addition of the DUT is associated with a hot swap with another DUT, wherein the other DUT is removed from the test system. 10. A testing method of claim 7 , wherein the testing suspension process comprises storing a current set of testing control data associated with the plurality of DUTs. 11. A testing method of claim 7 , wherein ending the testing suspension comprises rebooting the system. 12. A testing method of claim 7 , wherein performing the ending of the test suspension process comprises test control data synchronization. 13. A testing method of claim 7 , wherein performing the ending of the test suspension process comprises BIOS enumeration operations. 14. A system comprising: a user interface configured to enable user interaction with the system; a test board configured to communicatively couple with a plurality of devices under test (DUTs), wherein the DUTs are compute express link (CXL) protocol compliant; and a tester configured to direct testing of the plurality of DUTs, wherein the tester is configured to enable hot swap of one of the plurality of DUTs without interfering with testing of other DUTs in the plurality of DUTs, wherein an automatic hot swap management component and Direct Access Device (DAX) interfaces are at least partially included within the tester and respectively coupled to the plurality of DUTs, and wherein testing of the one of the plurality of DUTs is automatically suspended in response to receiving an indication associated with the hot swap of the one of the plurality of DUTs, and upon receiving an indication to begin testing for a DUT swapped into the plurality of DUTs, the testing is continued including of the DUT swapped into the plurality of DUTs; and wherein the user interface is utilized to generate a pause indication to remove a DUT and to generate an indication that a DUT has been swapped and to trigger a re-start. 15. A system of claim 14 , wherein the DUTs are memory devices. 16. A system of claim 14 , wherein a swapped one of the plurality of DUTs is automatically recognized by a host in a way that is transparent to users. 17. A system of claim 14 , wherein the tester automatically directs the hot swap in response to a user trigger, and wherein the DUTs operate as extended memory. 18. A system of claim 14 , wherein basic input/output system (BIOS) operations direct detection of characteristics associated with a swapped one of the plurality of DUTs.

Assignees

Inventors

Classifications

  • Test or assess a computer or a system · CPC title

  • G06F21/53Primary

    by executing in a restricted environment, e.g. sandbox or secure virtual machine · CPC title

  • Test interface between tester and unit under test · CPC title

  • Built-in tests · CPC title

  • using arrangements specific to the hardware being tested · CPC title

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What does patent US12353306B2 cover?
Efficient and effective testing systems and methods are presented. In one embodiment, a system includes: a user interface configured to enable user interaction with the system; a test board configured to communicatively couple with a plurality of devices under test (DUTs), wherein the DUTs are compute express link (CXL) protocol compliant; and a tester configured to direct testing of the plural…
Who is the assignee on this patent?
Advantest Corp
What technology area does this patent fall under?
Primary CPC classification G06F21/53. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 08 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).