Common symmetric memory key for parallel processes

Patent metadata

Field	Value
Publication number	US-12335372-B2
Application number	US-202318176521-A
Country	US
Kind code	B2
Filing date	Mar 1, 2023
Priority date	Mar 1, 2023
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

In one embodiment, a parallel computing system includes a key manager to assign symmetric memory keys to parallel computing jobs including a first symmetric memory key to a first parallel computing job, and a plurality of server nodes to execute parallel computing processes of the first parallel computing job, and cause registration of host memory regions of the server nodes with the assigned first symmetric memory key in corresponding network interface controllers of the server nodes so that different ones of the host memory regions are accessible with the first symmetric memory key by remote ones of the server nodes using remote direct memory access.

First claim

What is claimed is:

1. A parallel computing system, comprising:
a plurality of server nodes including respective processors configured to:
execute parallel computing processes of the first parallel computing job, symmetric memory keys being assigned by a key manager to parallel computing jobs including a first symmetric memory key to a first parallel computing job; and
cause registration of host memory regions of the server nodes with the assigned first symmetric memory key in corresponding network interface controllers of the server nodes so that different ones of the host memory regions are accessible with the first symmetric memory key by remote ones of the server nodes using remote direct memory access, wherein:

the server nodes include: a first server node including a first host memory and a first network interface controller; and a second server node including a second processor a second host memory, and a second interface controller;
the first network interface controller and the second interface controller are configured to provide network access to the first server node and the second server node, respectively;
the first network interface controller is configured to perform a first registration of a first memory region of the first host memory with the first symmetric memory key; and
the second network interface controller is configured to perform a second registration of a second memory region of the second host memory with the first symmetric memory key.

2. The system according to claim 1 , wherein the first server node includes a first processor being configured to access one of the host memory regions of the second server node using remote direct memory access with the first symmetric memory key.

3. The system according to claim 1 , wherein:
the first server node includes a first processor configured to:
execute a first parallel computing process of the first parallel computing job;
receive the first symmetric memory key;
select the first memory region of the first host memory; and
provide the first symmetric memory key and an identification of the first memory region to the first network interface controller;

the first network interface controller is configured to receive the first symmetric memory key and the identification of the first memory region;
the second server node includes a second processor is configured to:
execute a second parallel computing process of the first parallel computing job;
receive the first symmetric memory key;
select the second memory region of the second host memory; and
provide the first symmetric memory key and an identification of the second memory region to the second network interface controller; and

the second network interface controller is configured to receive the first symmetric memory key and the identification of the second memory region.

4. The system according to claim 3 , wherein:
the first network interface controller is configured to receive from a third parallel computing process of the first parallel computing job a first remote direct memory access request including the first symmetric memory key; and
the second network interface controller is configured to receive from a fourth parallel computing process of the first parallel computing job a second remote direct memory access request including the first symmetric memory key.

5. The system according to claim 3 , wherein:
the first network interface controller is configured to:
receive from a third parallel computing process of the first parallel computing job a first remote direct memory access request including the first symmetric memory key;
find the first memory region based on the first symmetric memory key included in the first remote direct memory access request and the first registration; and
write data to, or retrieve data from, the first memory region of the first host memory responsively to the found first memory region and the first remote direct memory access request; and

the second network interface controller is configured to:
receive from a fourth parallel computing process of the first parallel computing job a second remote direct memory access request including the first symmetric memory key;
find the second memory region based on the first symmetric memory key included in the second remote direct memory access request and the second registration; and
write data to, or retrieve data from, the second memory region of the second host memory responsively to the found second memory region and the second remote direct memory access request.

6. The system according to claim 3 , wherein:
the first parallel computing process includes a first parallel computing model and a first network library;
the first processor is configured to execute the first parallel computing model to: receive the first symmetric memory key; select the first memory region of the first host memory; and provide the first symmetric memory key and the identification of the first memory region to the first network library;
the first processor is configured to execute the first network library to provide the first symmetric memory key and the identification of the first memory region to the first network interface controller;
the second parallel computing process includes a second parallel computing model and a second network library;
the second processor is configured to execute the second parallel computing model is to: receive the first symmetric memory key; select the second memory region of the second host memory; and provide the first symmetric memory key and the identification of the second memory region to the second network library; and
the second processor is configured to execute the second network library to provide the first symmetric memory key and the identification of the second memory region to the second network interface controller.

7. The system according to claim 1 , further comprising the key manager is configured to: maintain a list of which of the symmetric memory keys are unassigned to active parallel computing jobs and which of the symmetric memory keys are assigned to the active parallel computing jobs; and assign one of the unassigned symmetric memory keys to the first parallel computing job.

8. The system according to claim 7 , further comprising a resource manager configured to:
establish the parallel computing processes of the first parallel computing job on the server nodes;
request an unassigned symmetric memory key from the key manager for the first parallel computing job;
receive the first symmetric memory key from the key manager for the first parallel computing job; and
provide the first symmetric memory key to the parallel computing processes of the first parallel computing job running on the server nodes, wherein the key manager is configured to indicate in the list that the first symmetric memory key is assigned to the first parallel computing job.

9. The system according to claim 1 , wherein the key manager is configured to assign the same symmetric memory key to two different parallel computing jobs which do not use one or more common ones of the network interface controllers.

10. The system according to claim 1 , wherein the key manager is configured to assign multiple symmetric memory keys to the first parallel computing job, wherein each of the server nodes is to cause registration of the multiple memory keys with corresponding multiple memory regions in a corresponding one of the network interface controllers.

11. A server node device, comprising:
a network interface controller to send and receive packets over a network; and
a host memory; and
a processor to:
execute a first parallel computing process

Assignees

• Mellanox Technologies Ltd

Inventors

• Venkata Manjunath Gorentla
• Polyakov Artem Yurievich
• Bhattacharya Subhadeep
• Bloch Gil
• Aderholdt William Ferrol

Classifications

• H04L9/14

  using a plurality of keys or algorithms · CPC title

• H04L2209/125

  Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations · CPC title

• H04L9/40

  Network security protocols · CPC title

• H04L9/0894

  Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage · CPC title

• H04L9/0819 Primary

  Key transport or distribution, i.e. key establishment techniques where one party creates or otherwise obtains a secret value, and securely transfers it to the other(s) (network architectures or network communication protocols for key distribution in a packet data network H04L63/062) · CPC title