Enabling an external resistor for an oscillator

Patent metadata

Field	Value
Publication number	US-12334869-B2
Application number	US-202318542861-A
Country	US
Kind code	B2
Filing date	Dec 18, 2023
Priority date	Apr 22, 2021
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror, an amplifier, and an on-chip resistor, where the on-chip resistor is coupled to a pin on the chip. The oscillator circuit also includes oscillator circuitry coupled to the charging current generator, where the oscillator circuitry includes a comparator, a phase generator, a first capacitor coupled to a first resistor, and a second capacitor coupled to a second resistor. The system also includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system includes an external capacitor coupled to the pin, where the external capacitor is external to the chip.

First claim

What is claimed is:

1. A device comprising:
an integrated circuit chip that includes:
a pin;
a current mirror that includes a first output and a second output;
a transistor coupled to the first output of the current mirror;
a first resistor coupled between the transistor and the pin;
a first switch coupled between the second output of the current mirror and a node;
a second switch coupled between the node and a ground node;
a variable resistor coupled to the node;
a capacitor coupled between the variable resistor and the ground node;
a comparator coupled to the node;
a phase generator coupled to the comparator that includes:
a first output configured to provide a first phase signal; and
a second output configured to provide a second phase signal; and

a selection circuit that includes:
a first input coupled to the node;
a second input coupled to the first output of the phase generator; and
a third input coupled to the second output of the phase generator.

2. The device of claim 1 , wherein:
the first switch is configured to close based on the first phase signal; and
the second switch is configured to close based on the second phase signal.

3. The device of claim 1 , wherein the integrated circuit chip further includes an amplifier that includes:
a first input;
a second input coupled to the first resistor; and
an output coupled to a gate of the transistor.

4. The device of claim 3 further comprising a reference voltage generator circuit coupled to the first input of the amplifier.

5. The device of claim 1 , wherein:
the node is a first node;
the variable resistor is a first variable resistor;
the capacitor is a first capacitor; and
the integrated circuit chip further includes:
a third switch coupled between the second output of the current mirror and a second node;
a fourth switch coupled between the second node and the ground node;
a second variable resistor coupled to the second node; and
a second capacitor coupled between the second variable resistor and the ground node.

6. The device of claim 5 , wherein:
the first switch and the fourth switch are configured to close based on a first signal; and
the second switch and the third switch are configured to close based on a second signal.

7. The device of claim 1 , wherein:
the transistor is a first transistor; and
the current mirror includes:
a second transistor that includes a gate;
a third transistor that includes a gate, wherein the second transistor and the third transistor are coupled in series between a voltage source and the first output of the current mirror;
a fourth transistor that includes a gate coupled to the gate of the second transistor; and
a fifth transistor that includes a gate coupled to the gate of the third transistor, wherein the fourth transistor and the fifth transistor are coupled in series between the voltage source and the second output of the current mirror.

8. A device comprising:
an integrated circuit chip that includes:
a pin;
a current mirror that includes a first output and a second output;
a transistor coupled to the first output of the current mirror;
a first resistor coupled between the transistor and the pin;
a first switch coupled between the second output of the current mirror and a node;
a second switch coupled between the node and a ground node;
a variable resistor coupled to the node; and
a first capacitor coupled between the variable resistor and the ground node; and

a second resistor coupled to the pin; and
a second capacitor coupled to the pin in parallel with the second resistor, wherein the second resistor and the second capacitor are external to the integrated circuit chip.

9. The device of claim 8 , wherein the integrated circuit chip further includes an amplifier that includes:
a first input;
a second input coupled to the first resistor; and
an output coupled to a gate of the transistor.

10. The device of claim 9 further comprising a reference voltage generator circuit coupled to the first input of the amplifier.

11. A system comprising:
a current mirror that includes a first output and a second output;
a transistor coupled to the first output of the current mirror;
a first resistor coupled to the transistor;
a second resistor that is distinct from the first resistor coupled between the first resistor and a ground;
a capacitor coupled between the first resistor and the ground in parallel with the second resistor;
a first switch coupled to the second output of the current mirror;
a second switch coupled between the first switch and the ground;
a third resistor coupled to the first switch; and
a second capacitor coupled between the third resistor and the ground.

12. The system of claim 11 , wherein the third resistor is a variable resistor.

13. The system of claim 11 further comprising:
a comparator coupled to the first switch; and
a phase generator coupled to the comparator that includes:
a first output configured to provide a first phase signal; and
a second output configured to provide a second phase signal.

14. The system of claim 13 , wherein:
the first switch is configured to operate based on the first phase signal; and
the second switch is configured to operate based on the second phase signal.

15. The system of claim 13 further comprising a selection circuit that includes:
a first input coupled to the first switch;
a second input coupled to the first output of the phase generator; and
a third input coupled to the second output of the phase generator.

16. The system of claim 11 further comprising an amplifier that includes:
a first input;
a second input coupled to the first resistor; and
an output coupled to a gate of the transistor.

17. The system of claim 16 further comprising a reference voltage generator circuit coupled to the first input of the amplifier.

18. The system of claim 11 , wherein:
the capacitor is a first capacitor; and
the system further comprises:
a third switch coupled to the second output of the current mirror;
a fourth switch coupled between the third switch and the ground;
a fourth resistor coupled to the third switch; and
a third capacitor coupled between the fourth resistor and the ground.

19. The system of claim 18 , wherein:
the first switch and the fourth switch are configured to operate based on a first signal; and
the second switch and the third switch are configured to operate based on a second signal.

20. The system of claim 11 further comprising a pin coupled between the first resistor and the second resistor.

Assignees

• Texas Instruments Inc

Inventors

• Agarwal Nitin
• Roy Aniruddha
• Narayana Reddy Preetham

Classifications

• H03B5/24

  active element in amplifier being semiconductor device (H03B5/26 takes precedence) · CPC title

• H03K3/0231 Primary

  Astable circuits {(H03K3/0315 takes precedence)} · CPC title

• H03B2200/0014

  Structural aspects of oscillators · CPC title

• H03B2200/0038

  including a current mirror · CPC title

• H03B2200/0034

  including a buffer amplifier · CPC title