Display device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-12334486-B2
Application number	US-202217889916-A
Country	US
Kind code	B2
Filing date	Aug 17, 2022
Priority date	Jan 20, 2022
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

A display device includes a conductive pattern on a substrate, a via layer on the conductive pattern with a via hole exposing the conductive pattern, a first electrode and a second electrode on the via layer and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, a bank layer on the first insulating layer defining an emission area and a subarea, a light-emitting element on the first insulating layer, and a first connection electrode and a second connection electrode on the first insulating layer and the light-emitting element. The first connection electrode electrically contacts an end of the light-emitting element, and the second connection electrode electrically contacts another end of the light-emitting element. The bank layer includes a bank extension portion extended to the subarea and the bank extension portion overlaps at least a portion of the via hole.

First claim

What is claimed:

1. A display device comprising:
a conductive pattern disposed on a substrate;
a via layer disposed on the conductive pattern, comprising a via hole, and exposing the conductive pattern;
a first electrode and a second electrode that are disposed on the via layer and spaced apart from each other;
a first insulating layer disposed on the first electrode and the second electrode;
a bank layer disposed on the first insulating layer and defining an emission area and a subarea;
a light-emitting element disposed on the first insulating layer in the emission area; and
a first connection electrode and a second connection electrode that are disposed on the first insulating layer and the light-emitting element, wherein
the first connection electrode electrically contacts an end of the light-emitting element and the second connection electrode electrically contacts another end of the light-emitting element,
the bank layer comprises a bank extension portion extended to the subarea, and
the bank extension portion overlaps at least a portion of the via hole in a plan view.

2. The display device of claim 1 , wherein
the via hole overlaps the bank layer in a plan view, and
at least a portion of the via hole is disposed in the subarea.

3. The display device of claim 2 , wherein the bank extension portion overlaps at least a portion of the via hole disposed in the subarea in a plan view.

4. The display device of claim 1 , further comprising:
a third connection electrode adjacent to the first connection electrode with the second connection electrode interposed therebetween,
wherein the first connection electrode and the third connection electrode are disposed in parallel with each other in a plan view and extend over the emission area and the subarea.

5. The display device of claim 4 , wherein
the bank extension portion is disposed between the first connection electrode and the third connection electrode, and
the bank extension portion protrudes and extends from the bank layer in a direction parallel to the first connection electrode or the third connection electrode in a plan view.

6. The display device of claim 4 , wherein the via hole overlaps the first electrode and the first connection electrode, and the entire first via hole overlaps the first electrode, in a plan view.

7. The display device of claim 4 , wherein the first connection electrode overlaps a portion of the via hole and does not overlap the bank extension portion in a plan view.

8. The display device of claim 1 , wherein an entire area of the bank extension portion overlaps the first electrode in a plan view.

9. The display device of claim 1 , wherein a side of the bank extension portion is disposed outside of a side of the adjacent first electrode in a plan view.

10. The display device of claim 1 , wherein a side of the bank extension portion is disposed outside of a side of the adjacent conductive pattern in a plan view.

11. The display device of claim 1 , further comprising:
a protective layer disposed between the conductive pattern and the via layer,
wherein the via hole penetrates the via layer and the protective layer and exposes the conductive pattern.

12. The display device of claim 1 , further comprising:
a second insulating layer disposed on the first insulating layer and the light-emitting element; and
a third insulating layer disposed on the second insulating layer and overlapping the second connection electrode in a plan view,
wherein the second insulating layer and the third insulating layer overlap the bank layer in a plan view.

13. A display device comprising:
a conductive pattern disposed on a substrate;
a via layer disposed on the conductive pattern, comprising a via hole, and exposing the conductive pattern;
a first electrode and a second electrode that are disposed on the via layer and spaced apart from each other; and
a bank layer disposed on the via layer and defining an emission area and a subarea, wherein
the bank layer comprises a bank extension portion extended to the subarea,
the first electrode extends from the emission area to the subarea and is electrically connected to the conductive pattern through the via hole,
at least a portion of the via hole is disposed in the subarea, and
the bank extension portion overlaps the via hole and the first electrode in the subarea in a plan view.

14. The display device of claim 13 , further comprising:
a first connection electrode disposed on the first electrode and a second connection electrode disposed on the second electrode,
wherein the via hole and the bank extension portion are disposed between the first connection electrode and the second connection electrode.

15. The display device of claim 14 , wherein
at least a portion of the via hole overlaps the bank extension portion in a plan view, and
another portion of the via hole does not overlap the bank extension portion in a plan view.

16. A method of manufacturing a display device, comprising:
forming a conductive pattern on a substrate;
forming, on the conductive pattern, a via layer comprising a via hole and exposing the conductive pattern;
forming a first electrode and a second electrode that are spaced apart from each other on the via layer;
forming, on the via layer, a bank layer defining an emission area and a subarea, the bank layer comprising a bank extension portion extending to the subarea;
forming a light-emitting element on the first electrode and the second electrode in the emission area; and
forming a first connection electrode in electrical contact with an end of the light-emitting element and a second connection electrode in electrical contact with another end of the light-emitting element,
wherein the bank extension portion overlaps at least a portion of the via hole in a plan view.

17. The method of claim 16 , wherein the bank layer and the bank extension portion are simultaneously formed by forming a bank material layer on the via layer and patterning the bank material layer.

18. The method of claim 16 , further comprising:
before the forming of the via layer, forming a protective layer disposed on the conductive pattern,
wherein the via hole is formed by simultaneously etching both the protective layer and the via layer such that at least a portion of the via hole is disposed in the subarea.

19. The method of claim 16 , wherein the bank extension portion is formed such that an entire area of the bank extension portion overlaps the first electrode in a plan view.

20. The method of claim 16 , wherein the bank extension portion overlaps the first electrode and the conductive pattern in a plan view.

Assignees

• Samsung Display Co Ltd

Inventors

• Kim In Woo
• Kwon Chang Woo
• Kim Dae Cheol
• Park Jong Hwan
• Cho Yong Tae
• Choi Kook Hyun

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10W90/22

  the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W70/654

  Top-view layouts · CPC title

• H10W70/093

  Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title