Photonic communication platform

Patent metadata

Field	Value
Publication number	US-12332479-B2
Application number	US-202418606188-A
Country	US
Kind code	B2
Filing date	Mar 15, 2024
Priority date	Mar 6, 2019
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.

First claim

What is claimed is:

1. A photonic communication platform comprising:
a semiconductor photonic substrate comprising an optical network having a plurality of optical waveguides and a plurality of optical transceivers coupled to respective optical waveguides, wherein the plurality of optical waveguides and the plurality of optical transceivers are lithographically patterned on the semiconductor photonic substrate;
a plurality of electrical connections configured to electrically couple the optical network to a plurality of electronic chips when the electronic chips are mounted on the semiconductor photonic substrate, wherein at least one electronic chip of the plurality of electronic chips comprises a memory; and
a controller configured to control the optical network to broadcast a message generated by a first electronic chip of the plurality of electronic chips to more than one of the remaining electronic chips of the plurality of electronic chips, when the plurality of electronic chips are mounted on the semiconductor photonic substrate.

2. The photonic communication platform of claim 1 , wherein the first electronic chip comprises a processor.

3. The photonic communication platform of claim 2 , wherein the remaining electronic chips comprise memories.

4. The photonic communication platform of claim 1 , wherein the electrical connections comprise through-silicon vias, copper pillars, micro-bumps or ball-grid arrays.

5. The photonic communication platform of claim 1 , wherein the photonic network is configured to:
receive a first electrical signal from the first electronic chip;
convert, using a first optical transceiver of the plurality of optical transceivers, the first electrical signal received from the first electronic chip to an optical signal;
support propagation of the optical signal from the first optical transceiver to a second optical transceiver of the plurality of optical transceivers using one or more optical waveguides of the plurality of optical waveguides;
convert, using the second optical transceiver, the optical signal to a second electrical signal; and
convey the second electrical signal to the more than one of the remaining electronic chips.

6. The photonic communication platform of claim 1 , wherein the optical network defines a plurality of photonic modules that are copies of a template photonic module, each photonic module being sized to accommodate at least one electronic chip of the plurality of electronic chips.

7. The photonic communication platform of claim 6 , wherein a first photonic module of the plurality of photonic modules is sized to accommodate at least two electronic chips of the plurality of electronic chips in a stacked configuration.

8. The photonic communication platform of claim 6 , wherein a first photonic module of the plurality of photonic modules is sized to accommodate at least two electronic chips of the plurality of electronic chips in a side-by-side configuration.

9. The photonic communication platform of claim 1 , wherein the photonic modules are arranged in a 2-dimensional grid.

10. The photonic communication platform of claim 1 , wherein a first remaining electronic chip of the remaining electronic chips is the at least one electronic chip that comprises the memory.

11. The photonic communication platform of claim 1 , wherein the controller is configured to control the optical network to broadcast the message to each of the remaining electronic chips of the plurality of electronic chips, when the plurality of electronic chips are mounted on the semiconductor photonic substrate.

12. The photonic communication platform of claim 1 , wherein the optical network further comprises a plurality of optical switches coupled to the plurality of optical waveguides, wherein the controller is configured to control the optical network to broadcast the message to more than one of the remaining electronic chips by controlling the plurality of optical switches.

13. The photonic communication platform of claim 12 , wherein the plurality of optical switches comprise at least one selected from the group consisting of Mach-Zehnder interferometers, optical resonators, multimode interference (MMI) waveguides, arrayed waveguide gratings (AWG), thermos-optic switches, acousto-optic switches, magneto-optic switches, MEMS optical switches, non-linear optical switches, liquid crystal switches, piezoelectric beam steering switches, grating switches and dispersive switches.

14. A method for broadcasting messages using a semiconductor photonic substrate, comprising:
receiving a first electrical signal from a first electronic chip of a plurality of electronic chips;
converting to an optical signal, using an optical transmitter lithographically patterned on the semiconductor photonic substrate, the first electrical signal received from the first electronic chip;
broadcasting the optical signal from the optical transmitter to each of a plurality of optical receivers using a plurality of optical waveguides, wherein the plurality of optical receivers and the plurality of optical waveguides are lithographically patterned on the semiconductor photonic substrate;
converting, using the plurality of optical receivers, the optical signal to a plurality of electrical signals; and
conveying the plurality of electrical signals to the remaining electronic chips of the plurality of electronic chips.

15. The method of claim 14 , wherein conveying the plurality of electrical signals to the remaining electronic chips is performed using a plurality of electrical connections electrically coupling the semiconductor photonic substrate to the plurality of electronic chips.

16. The method of claim 15 , wherein the electrical connections comprise through-silicon vias, copper pillars, micro-bumps or ball-grid arrays.

17. The method of claim 14 , wherein the first electronic chip comprises a processor.

18. The method of claim 17 , wherein the remaining electronic chips comprise memories.

19. The method of claim 14 , wherein conveying the plurality of electrical signals to the remaining electronic chips comprises controlling an optical network coupled to the plurality of optical waveguides.

20. The method of claim 19 , wherein the optical network defines a plurality of photonic modules that are copies of a template photonic module, each photonic module being sized to accommodate at least one electronic chip of the plurality of electronic chips.

Assignees

• Lightmatter Inc

Inventors

• Harris Nicholas C
• Ramey Carl
• Gould Michael
• Graham Thomas
• Bunandar Darius
• Braid Ryan
• Tymchenko Mykhailo

Classifications

• H10P76/2042

  using lasers · CPC title

• H04J14/0307

  Multiplexers; Demultiplexers · CPC title

• H04J14/02

  Wavelength-division multiplex systems · CPC title

• G02B6/136

  by etching · CPC title

• G02B6/12007

  forming wavelength selective elements, e.g. multiplexer, demultiplexer · CPC title