Limiting circuitry with controlled parallel direct current-direct current-converters

Patent metadata

Field	Value
Publication number	US-12332302-B2
Application number	US-202318130714-A
Country	US
Kind code	B2
Filing date	Apr 4, 2023
Priority date	Apr 25, 2022
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

Limiting circuitry is disclosed. In one example, the limiting circuitry provides limited electric current and/or limited electric voltage for electrically testing at least one device under test. The limiting circuitry comprises a plurality of DC-DC-converters being connected in parallel to each other, each being provided with an electric input DC voltage and each being configured for providing a converted electric output current to be forwarded to an assigned one of electric contacts for contacting the at least one device under test. A control mechanism is configured for controlling the DC-DC-converters for limiting the electric output current and/or an electric output voltage which relates to said electric output current.

First claim

What is claimed is:

1. Limiting circuitry for providing limited electric current and/or limited electric voltage for electrically testing at least one device under test, wherein the limiting circuitry comprises:
a plurality of DC-DC-converters being connected in parallel to each other, each being provided with an electric input DC voltage and a set current control signal and each being configured for providing a converted electric output current based on the set current control signal to be forwarded to an assigned one of electric contacts for contacting the at least one device under test; and
control circuitry configured for controlling the DC-DC-converters for limiting the electric output current and/or an electric output voltage which relates to said electric output current.

2. The limiting circuitry according to claim 1 , wherein each of the plurality of DC-DC-converters is configured for providing a constant converted electric output current.

3. The limiting circuitry according to claim 1 , comprising an AC-DC-converter for converting an electric input AC voltage into the electric input DC voltage provided to the plurality of DC-DC-converters.

4. The limiting circuitry according to claim 1 , comprising a current-to-voltage-converter configured for converting an overall actual electric current provided by the plurality of DC-DC converters, indicating a sum of the electric output currents provided by the plurality of DC-DC-converters, into a voltage level used by the control circuitry for controlling the DC-to-DC converters.

5. The limiting circuitry according to claim 1 , wherein the control circuitry is configured for supplying the set current control signal, which depends on a predefined overall target electric current to be supplied to the at least one device under test for all electric contacts being represented by a voltage level, to the plurality of DC-DC-converters.

6. The limiting circuitry according to claim 5 , wherein the predefined overall target electric current being represented by the voltage level is at least 0.1 Ampère, in particular at least 10 Ampère.

7. The limiting circuitry according to claim 1 , wherein the control circuitry is configured for supplying the set current control signal, which depends on an overall actual electric current provided by the plurality of DC-DC-converters and being represented by a voltage level, to the plurality of DC-DC-converters.

8. The limiting circuitry according to claim 5 , wherein the control circuitry is configured for supplying the set current control signal to the plurality of DC-DC-converters depending on a result of a comparison between the predefined overall target electric current and an overall actual electric current provided by the plurality of DC-DC-converters represented by a voltage level.

9. The limiting circuitry according to claim 1 , wherein the control circuitry is configured for providing the DC-DC-converters with at least one sense signal sensed at the at least one device under test and being indicative of a voltage at at least one of the electric contacts for contacting the at least one device under test.

10. The limiting circuitry according to claim 1 , wherein the control circuitry is configured for providing each of the DC-DC-converters with a voltage signal based on another voltage signal which represents a maximum power to be provided to all DC-to-DC converters.

11. The limiting circuitry according to claim 1 , wherein the control circuitry is configured for controlling the DC-DC-converters for limiting an electric output voltage to not exceed a predefined threshold voltage value.

12. The limiting circuitry according to claim 1 , wherein the control circuitry is configured for controlling the DC-DC-converters so that different ones of the DC-DC-converters provide different values of the electric output current.

13. The limiting circuitry according to claim 1 , wherein the control circuitry is configured for controlling the DC-DC-converters so that all DC-DC-converters provide the same value of the electric output current.

14. The limiting circuitry according to claim 1 , wherein the control circuitry is configured for automatically regulating the DC-DC-converters for limiting the electric output current, in particular without intervention by a user.

15. The limiting circuitry according to claim 1 , wherein a part of the control circuitry is integrated in the plurality of DC-DC-converters and another part of the control circuitry is provided apart from the plurality of DC-DC-converters.

16. The limiting circuitry according to claim 1 , wherein the control circuitry is configured for, in each of the DC-DC-converters:
comparing the electric output current of the respective DC-DC-converter with a sense signal sensed at at least one of the electric contacts of the at least one device under test and being indicative of a voltage of the at least one device under test;
further comparing a result of said comparing with a predefined voltage signal being correlated with a maximum power to be provided to all DC-to-DC converters; and
limiting the electric output current of the respective DC-DC-converter if the result of the further comparing indicates a need for limiting.

17. A tester for testing at least one device under test, wherein the tester comprises:
a prober for contacting the at least one device under test for testing the at least one device under test; and
an electric test unit comprising a limiting circuitry according to claim 1 and being coupled with the prober for supplying electric signals to the at least one device under test and for receiving and analysing a plurality of response signals from the at least one device under test.

18. The tester according to claim 17 , comprising at least one of the following features:
the tester is configured for testing a plurality of semiconductor chips on wafer level as devices under test; and
the tester is configured for testing a plurality of separated encapsulated semiconductor chips as devices under test.

19. A method of limiting electric current and/or electric voltage for electrically testing at least one device under test, wherein the method comprises:
connecting a plurality of DC-DC-converters in parallel to each other;
providing each of the DC-DC-converters with an electric input direct voltage and a set Current control signal;
generating, by the DC-DC-converters, a converted electric output current based on the set current control signal to be forwarded to an assigned one of electric contacts for contacting the at least one device under test; and
controlling the DC-DC-converters for limiting the electric output current and/or an electric output voltage which relates to said electric output current.

20. The method according to claim 19 , wherein electrically testing the at least one device under test comprises at least one of the following:
testing a plurality of semiconductor chips on wafer level as devices under test;
testing a plurality of separated encapsulated semiconductor chips as devices under test; or
testing a silicon carbide chip as device under test.

Assignees

• Infineon Technologies Ag

Inventors

• Frank Peter Johannes
• Schmid Siegfried
• Slamnig Walter Johann

Classifications

• G01R31/2896

  Testing of IC packages; Test features related to IC packages (containers per se H10W76/10, encapsulations per se H10W74/00) · CPC title

• H02M1/0009

  Devices or circuits for detecting current in a converter · CPC title

• H02M1/32

  Means for protecting converters other than automatic disconnection · CPC title

• H02M3/003

  Constructional details, e.g. physical layout, assembly, wiring or busbar connections · CPC title

• H02M1/007

  Plural converter units in cascade (push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826) · CPC title