Metal-insulator-metal capacitor and methods of manufacturing

US12328886B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12328886-B2
Application numberUS-202217662571-A
CountryUS
Kind codeB2
Filing dateMay 9, 2022
Priority dateMay 9, 2022
Publication dateJun 10, 2025
Grant dateJun 10, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Some implementations described herein provide a semiconductor device and methods of formation. The semiconductor device may include a photodiode device electrically connected to a metal-insulator-metal deep-trench capacitor. The metal-insulator-metal deep-trench capacitor includes a layer of an amorphous material between an insulator layer stack of the deep-trench capacitor structure and a capacitor bottom metal layer of the metal-insulator-metal deep-trench capacitor. The amorphous material includes a bandgap energy level that provides a conduction band offset and lowers a probability of electron tunneling from the capacitor bottom metal electrode layer to the insulator layer stack. In this way, leakage associated with grain boundaries, crystal defects, and interfaces of a bottom layer of the insulator layer stack may be overcome to improve a lag performance of the semiconductor device including the metal-insulator-metal deep-trench capacitor.

First claim

Opening claim text (preview).

What is claimed is: 1. A device, comprising: a metal layer; one or more dielectric layers at least partially on the metal layer, wherein the one or more dielectric layers comprises a trench region exposing a portion of the metal layer; and a capacitor structure comprising: a capacitor bottom metal electrode layer in the trench region and on the portion of the metal layer; a coating treatment layer on an entire inner periphery of the capacitor bottom metal electrode layer; an amorphous material layer on the coating treatment layer, wherein the amorphous material layer comprises a first bandgap; and an insulator layer stack on the amorphous material layer, wherein the insulator layer stack comprises a bottom material layer comprising a second bandgap that is lesser relative to the first bandgap. 2. The device of claim 1 , wherein the coating treatment layer comprises: a titanium oxy nitride material. 3. The device of claim 1 , wherein the amorphous material layer comprises: an aluminum oxide material, and wherein the bottom material layer comprises a zirconium dioxide material. 4. The device of claim 1 , wherein the amorphous material layer comprises: a silicon dioxide material, and wherein the bottom material layer comprises a zirconium dioxide material, or wherein the bottom material layer comprises an aluminum oxide material. 5. The device of claim 1 , wherein the second bandgap is less than approximately 5.8 electron volts. 6. The device of claim 1 , wherein the amorphous material layer comprises: a thickness that is included in a range of approximately 2 angstroms to approximately 16 angstroms. 7. The device of claim 1 , wherein the insulator layer stack comprises: at least one layer of an aluminum oxide material. 8. The device of claim 1 , wherein the insulator layer stack comprises: at least one layer of a zirconium dioxide material. 9. The device of claim 1 , wherein the amorphous material layer includes an aluminum monoxide material, a hafnium silicate material, a lanthanum oxide material, an aluminum nitride material, or a zirconium silicate material. 10. A semiconductor device, comprising: a stack of dielectric layers comprising a trench region exposing a portion of a metal layer at least partially under the stack of dielectric layers; a capacitor structure comprising: a capacitor bottom metal electrode layer in the trench region and on an entire inner periphery of the portion of the metal layer; an amorphous material layer over the capacitor bottom metal electrode layer, wherein the amorphous material layer comprises a first bandgap; and an insulator layer stack comprising a bottom layer on the amorphous material layer, wherein the bottom layer comprises a second bandgap that is lesser relative to the first bandgap; and integrated circuitry comprising a photodiode that is electrically connected to the capacitor structure. 11. The semiconductor device of claim 10 , wherein the semiconductor device corresponds to an image sensor device, and wherein the capacitor structure is configured as a lateral overflow integration capacitor to improve a lag performance of the image sensor device. 12. The semiconductor device of claim 10 , wherein the capacitor structure corresponds to a metal-insulator-metal capacitor structure. 13. The semiconductor device of claim 10 , wherein the capacitor bottom metal electrode layer is along a contour of the trench region. 14. The semiconductor device of claim 10 , further comprising: a coating treatment layer between the capacitor bottom metal electrode layer and the amorphous material layer. 15. A device, comprising: one or more first dielectric layers on a second dielectric layer and a metal layer, wherein the one or more first dielectric layers comprises a trench region exposing a portion of the metal layer; a capacitor bottom metal electrode layer in the trench region and on the portion of the metal layer; a coating treatment layer on an entire inner periphery of the capacitor bottom metal electrode layer; an amorphous material layer on the coating treatment layer; and an insulator layer stack on the amorphous material layer. 16. The device of claim 15 , wherein the amorphous material layer comprises: a silicon dioxide material. 17. The device of claim 15 , wherein the amorphous material layer comprises: a thickness that is less than approximately 2 angstroms or greater than approximately 16 angstroms. 18. The device of claim 15 , wherein the insulator layer stack comprises a zirconium dioxide material. 19. The device of claim 15 , wherein the one or more first dielectric layers comprises at least one of: an inter-layer dielectric (ILD) layer, or an upper inter-metal dielectric (IMD) layer. 20. The device of claim 15 , wherein the second dielectric layer comprises an inter-metal dielectric (IMD) layer.

Assignees

Inventors

Classifications

  • having vertical extensions · CPC title

  • H10D1/714Primary

    having horizontal extensions · CPC title

  • Trench conductor-insulator-semiconductor capacitors, e.g. trench MOS capacitors · CPC title

  • of conductor-insulator-semiconductor capacitors, e.g. trench capacitors · CPC title

  • using deposition processes to form electrode extensions · CPC title

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What does patent US12328886B2 cover?
Some implementations described herein provide a semiconductor device and methods of formation. The semiconductor device may include a photodiode device electrically connected to a metal-insulator-metal deep-trench capacitor. The metal-insulator-metal deep-trench capacitor includes a layer of an amorphous material between an insulator layer stack of the deep-trench capacitor structure and a capa…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D1/714. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 10 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).