Method for adjusting chip mounting position, apparatus, medium, and electronic device

US12327740B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12327740-B2
Application numberUS-202217668654-A
CountryUS
Kind codeB2
Filing dateFeb 10, 2022
Priority dateMay 13, 2021
Publication dateJun 10, 2025
Grant dateJun 10, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A method for adjusting a chip mounting position, an apparatus, a medium, and an electronic device are provided. The adjustment method includes: obtaining offsets of actual mounting positions of individual chips in a first group of chips; obtaining an average offset for the actual mounting positions of the individual chips in the first group of chips according to the offsets of the actual mounting positions of the individual chips in the first group of chips; and adjusting the chip mounting position according to the average offset for the actual mounting positions of the individual chips in the first group of chips.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for adjusting a chip mounting position, comprising: obtaining offsets of actual mounting positions of individual chips in a first group of chips; obtaining an average offset for the actual mounting positions of the individual chips in the first group of chips according to the offsets of the actual mounting positions of the individual chips in the first group of chips; adjusting the chip mounting position according to the average offset for the actual mounting positions of the individual chips in the first group of chips; and wherein said adjusting the chip mounting position according to the average offset for the actual mounting positions of the individual chips in the first group of chips comprises: adjusting, according to a first proportion of the average offset for the actual mounting positions of the individual chips in the first group of chips, a mounting component for mounting the chip. 2. The method according to claim 1 , wherein said obtaining offsets of actual mounting positions of individual chips in a first group of chips comprises: obtaining initial calibration positions of the individual chips in the first group of chips; obtaining the actual mounting positions of the individual chips in the first group of chips; and obtaining the offsets of the actual mounting positions of the individual chips in the first group of chips according to the initial calibration positions of the individual chips in the first group of chips and the actual mounting positions of the individual chips in the first group of chips. 3. The method according to claim 1 , wherein said adjusting, according to a first proportion of the average offset for the actual mounting positions of the individual chips in the first group of chips, a mounting component for mounting the chip comprises: adjusting, according to a half of the average offset for the actual mounting positions of the individual chips in the first group of chips, the mounting component for mounting the chip. 4. The method according to claim 1 , wherein said adjusting, according to a first proportion of the average offset for the actual mounting positions of the individual chips in the first group of chips, a mounting component for mounting the chip comprises: adjusting, according to the first proportion of the average offset for the actual mounting positions of the individual chips in the first group of chips, a suction nozzle or a mechanical arm for mounting the chip. 5. The method according to claim 1 , wherein the offsets of the actual mounting positions of the individual chips in the first group of chips comprise displacement offsets and angle offsets, and said adjusting the chip mounting position according to the average offset for the actual mounting positions of the individual chips in the first group of chips comprises: adjusting the chip mounting position according to an average displacement offset and an average angle offset for the actual mounting positions of the individual chips in the first group of chips. 6. The method according to claim 5 , wherein said adjusting the chip mounting position according to an average displacement offset and an average angle offset for the actual mounting positions of the individual chips in the first group of chips comprises: adjusting, according to a first proportion of each of the average displacement offset and the average angle offset for the actual mounting positions of the individual chips in the first group of chips, a mounting component for mounting the chip. 7. The method according to claim 6 , wherein said adjusting, according to a first proportion of each of the average displacement offset and the average angle offset for the actual mounting positions of the individual chips in the first group of chips, a mounting component for mounting the chip comprises: respectively obtaining a corresponding adjustment amount of a displacement adjustment motor for the mounting component and a corresponding adjustment amount of an angle adjustment motor for the mounting component according to the average displacement offset and the average angle offset for the actual mounting positions of the individual chips in the first group of chips; and adjusting the mounting component according to the corresponding adjustment amount of the displacement adjustment motor for the mounting component and the corresponding adjustment amount of the angle adjustment motor for the mounting component. 8. The method according to claim 7 , wherein said adjusting the mounting component according to the corresponding adjustment amount of the displacement adjustment motor for the mounting component and the corresponding adjustment amount of the angle adjustment motor for the mounting component comprises: respectively obtaining a pulse number of the displacement adjustment motor for the mounting component and a pulse number of the angle adjustment motor for the mounting component according to the corresponding adjustment amount of the displacement adjustment motor for the mounting component and the corresponding adjustment amount of the angle adjustment motor for the mounting component; and adjusting the mounting component according to the pulse number of the displacement adjustment motor for the mounting component and the pulse number of the angle adjustment motor for the mounting component. 9. The method according to claim 5 , wherein the displacement offset comprises a displacement offset in a first direction and a displacement offset in a second direction, and said adjusting the chip mounting position according to an average displacement offset and an average angle offset for the actual mounting positions of the individual chips in the first group of chips comprises: adjusting the chip mounting position according to an average displacement offset in the first direction, an average displacement offset in the second direction, and the average angle offset for the actual mounting positions of the individual chips in the first group of chips. 10. The method according to claim 1 , further comprising: giving an alarm when an offset of a chip in the first group of chips exceeds a control limit.

Assignees

Inventors

Classifications

  • Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates · CPC title

  • Position monitoring, e.g. misposition detection or presence detection · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

Patent family

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What does patent US12327740B2 cover?
A method for adjusting a chip mounting position, an apparatus, a medium, and an electronic device are provided. The adjustment method includes: obtaining offsets of actual mounting positions of individual chips in a first group of chips; obtaining an average offset for the actual mounting positions of the individual chips in the first group of chips according to the offsets of the actual mounti…
Who is the assignee on this patent?
Changxin Memory Tech Inc
What technology area does this patent fall under?
Primary CPC classification H10P72/0446. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 10 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).