Method of manufacturing multilayer capacitor

US12327684B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12327684-B2
Application numberUS-202217959575-A
CountryUS
Kind codeB2
Filing dateOct 4, 2022
Priority dateNov 25, 2021
Publication dateJun 10, 2025
Grant dateJun 10, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of manufacturing a multilayer capacitor includes preparing a guide frame, forming at least one dielectric layer between at least two surfaces of the guide frame such that at least a portion of each side surface of the at least one dielectric layer is in contact with the at least two surfaces, forming at least one internal electrode on an upper surface of the at least one dielectric layer between at least two surfaces of the guide frame using an inkjet printing method, and separating at least two surfaces of the guide frame from the at least one dielectric layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a multilayer capacitor, the method comprising: preparing a guide frame; forming at least one dielectric layer between at least two surfaces of the guide frame such that at least a portion of each side surface of the at least one dielectric layer is in contact with the at least two surfaces of the guide frame; forming at least one internal electrode on an upper surface of the at least one dielectric layer between the at least two surfaces of the guide frame using an inkjet printing method; and separating the at least two surfaces of the guide frame from the at least one dielectric layer, wherein the forming at least one internal electrode and the forming at least one dielectric layer are alternately performed two or more times by the inkjet printing method to form a plurality of internal electrodes and a plurality of dielectric layers. 2. The method of claim 1 , wherein the guide frame includes at least four surfaces surrounding the at least one dielectric layer and the at least one internal electrode and in contact with at least a portion of each side surface of the at least one dielectric layer, and wherein the at least four side surfaces include the at least two surfaces. 3. The method of claim 2 , wherein the guide frame further includes a lower surface supporting the at least one dielectric layer and the at least one internal electrode. 4. The method of claim 3 , wherein the lower surface of the guide frame includes a thermoplastic insulating material, different from a material of the at least four surfaces. 5. The method of claim 3 , wherein the separating includes separating the at least four surfaces from the lower surface of the guide frame. 6. The method of claim 1 , wherein the separating includes separating the at least two surfaces of the guide frame from the at least one dielectric layer after a structure in which the at least one dielectric layer and the at least one internal electrode are laminated is compressed in a lamination direction. 7. The method of claim 1 , further comprising, after the separating the at least two surfaces of the guide frame from the at least one dielectric layer, cutting a structure in which the at least one dielectric layer and the at least one internal electrode are laminated. 8. The method of claim 1 , wherein the forming at least one internal electrode includes forming the at least one internal electrode such that at least a portion of each side surface of the at least one internal electrode is in contact with the at least two surfaces of the guide frame. 9. The method of claim 1 , wherein the forming at least one dielectric layer includes, after one of the plurality of internal electrodes is formed on one of the plurality of dielectric layers, forming another one of the plurality of dielectric layers while leaving a space in which the one of the plurality of internal electrodes is not formed on the one of the plurality of dielectric layers. 10. The method of claim 1 , wherein the forming at least one internal electrode includes forming the at least one internal electrode such that each of the at least one internal electrode has a thickness of 0.25 μm or less.

Assignees

Inventors

Classifications

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

  • Energy storage using capacitors · CPC title

  • H01G4/012Primary

    Form of non-self-supporting electrodes · CPC title

  • characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence) · CPC title

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What does patent US12327684B2 cover?
A method of manufacturing a multilayer capacitor includes preparing a guide frame, forming at least one dielectric layer between at least two surfaces of the guide frame such that at least a portion of each side surface of the at least one dielectric layer is in contact with the at least two surfaces, forming at least one internal electrode on an upper surface of the at least one dielectric lay…
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 10 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).