Display panel and display device

US12322338B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12322338-B2
Application numberUS-202418421288-A
CountryUS
Kind codeB2
Filing dateJan 24, 2024
Priority dateMar 24, 2023
Publication dateJun 3, 2025
Grant dateJun 3, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes a plurality of pixels, a scan driver, a data driver, and a read-out circuit configured to read out electrical characteristics of the plurality of pixels. A first pixel of the plurality of pixels includes a first transistor connected to a first node and having a gate connected to a second node, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor including a first terminal connected to a seventh conductive line, a second terminal connected to the second node, and having a gate connected to a fourth conductive line, a seventh transistor including a first terminal connected to the seventh conductive line, a second terminal connected to a third node, and a gate connected to a fifth conductive line, a capacitor, and an organic light emitting diode.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device comprising: a plurality of pixels arranged in rows and columns; a scan driver connected to the rows of the plurality of pixels through a plurality of first conductive lines, a plurality of second conductive lines, a plurality of third conductive lines, a plurality of fourth conductive lines, and a plurality of fifth conductive lines; a data driver connected to the columns of the plurality of pixels through a plurality of sixth conductive lines; and a read-out circuit connected to the columns of the plurality of pixels through a plurality of seventh conductive lines and configured to obtain a plurality of read-out signals indicating electrical characteristics of the plurality of pixels through the plurality of seventh conductive lines, wherein a first pixel of the plurality of pixels is connected to a first conductive line among the plurality of first conductive lines, a second conductive line among the plurality of second conductive lines, a third conductive line among the plurality of third conductive lines, a fourth conductive line among the plurality of fourth conductive lines, a fifth conductive line among the plurality of fifth conductive lines, a sixth conductive line among the plurality of sixth conductive lines and a seventh conductive line among the plurality of seventh conductive lines, and the first pixel comprises: a first transistor comprising a first terminal connected to a first node, a second terminal connected to a third node, and a gate connected to a second node; a second transistor comprising a first terminal connected to the sixth conductive line, a second terminal connected to the first node, and a gate connected to the first conductive line; a third transistor comprising a first terminal connected to the second node, a second terminal connected to the third node, and a gate connected to the first conductive line; a fourth transistor comprising a first terminal connected to a power supply node to which a power supply voltage is supplied, a second terminal connected to the first node, and a gate connected to the second conductive line; a fifth transistor comprising a first terminal connected to the third node, a second terminal, and a gate connected to the third conductive line; a sixth transistor comprising a first terminal connected to the seventh conductive line, a second terminal connected to the second node, and a gate connected to the fourth conductive line; a seventh transistor comprising a first terminal connected to the seventh conductive line, a second terminal connected to the third node, and a gate connected to the fifth conductive line; a capacitor connected between the first node and the second node; and an organic light emitting diode connected between the second terminal of the fifth transistor and a ground node to which a ground voltage is supplied. 2. The display device of claim 1 , wherein the scan driver is configured to, in a reset period, output a first control signal at an inactive level through the first conductive line, a second control signal at an active level through the second conductive line, a third control signal at an inactive level through the third conductive line, a fourth control signal at an active level through the fourth conductive line, and a fifth control signal at an inactive level through the fifth conductive line. 3. The display device of claim 1 , wherein the scan driver is configured to, in a program period, output a first control signal at an active level through the first conductive line, output a second control signal at an inactive level through the second conductive line, output a third control signal at an inactive level through the third conductive line, output a fourth control signal at an inactive level through the fourth conductive line, and output a fifth control signal at an inactive level through the fifth conductive line. 4. The display device of claim 1 , wherein the scan driver is configured to, in a hold period, output a first control signal at an inactive level through the first conductive line, a second control signal at an inactive level through the second conductive line, a third control signal at an inactive level through the third conductive line, a fourth control signal at an inactive level through the fourth conductive line, and a fifth control signal at an inactive level through the fifth conductive line. 5. The display device of claim 1 , wherein the scan driver is configured to, in a light emission period, output a first control signal at an inactive level through the first conductive line, output a second control signal at an active level through the second conductive line, output a third control signal at an active level through the third conductive line, output a fourth control signal at an inactive level through the fourth conductive line, and output a fifth control signal at an inactive level through the fifth conductive line. 6. The display device of claim 1 , wherein the scan driver is configured to, in a first read-out period, output a first control signal at an inactive level through the first conductive line, output a second control signal at an active level through the second conductive line, output a third control signal at an inactive level through the third conductive line, output a fourth control signal at an inactive level through the fourth conductive line, and output a fifth control signal at an active level through the fifth conductive line, and wherein the read-out circuit is further configured to generate data corresponding to a drive current based on a corresponding read-out signal, among the plurality of read-out signals, received through the seventh conductive line. 7. The display device of claim 6 , wherein the scan driver is further configured to, in a second read-out period, output the first control signal at an active level through the first conductive line, output the second control signal at an inactive level through the second conductive line, output the third control signal at an inactive level through the third conductive line, output the fourth control signal at an inactive level through the fourth conductive line, and output the fifth control signal at an active level through the fifth conductive line, and wherein the read-out circuit is further configured to generate data corresponding to a threshold voltage based on the corresponding read-out signal received through the seventh conductive line. 8. The display device of claim 7 , wherein the scan driver is further configured to, in a third read-out period, output the first control signal at an inactive level through the first conductive line, output the second control signal at an active level through the second conductive line, output the third control signal at an active level through the third conductive line, output the fourth control signal at an inactive level through the fourth conductive line, and output the fifth control signal at an active level through the fifth conductive line, and wherein the read-out circuit is further configured to generate data corresponding to a forward voltage based on the corresponding read-out signal received through the seventh conductive line. 9. The display device of claim 1 , wherein the data driver is configured to control brightness of the organic light emitting diode by controlling a voltage of the sixth conductive line. 10. The display device of claim 1 , wherein the scan driver is configured, in a light emission period, output a first control signal at an inactive level through the first conductive line, output a second control signal at an active level through the second conductive line, output a fourth control signal at an inactive level through

Assignees

Inventors

Classifications

  • Details of driving circuits arranged to drive both scan and data electrodes · CPC title

  • used for selection purposes, e.g. logical AND for partial update · CPC title

  • Details of drivers for data electrodes · CPC title

  • Details of drivers for scan electrodes · CPC title

  • used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

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Frequently asked questions

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What does patent US12322338B2 cover?
A display device includes a plurality of pixels, a scan driver, a data driver, and a read-out circuit configured to read out electrical characteristics of the plurality of pixels. A first pixel of the plurality of pixels includes a first transistor connected to a first node and having a gate connected to a second node, a second transistor, a third transistor, a fourth transistor, a fifth transi…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3233. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 03 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).