Semiconductor module
US-2021280555-A1 · Sep 9, 2021 · US
US12308305B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12308305-B2 |
| Application number | US-201917754779-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 28, 2019 |
| Priority date | Nov 28, 2019 |
| Publication date | May 20, 2025 |
| Grant date | May 20, 2025 |
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Official abstract text for this publication.
An object of the present invention is to provide a power semiconductor device enabling a downsizing of a module. A power semiconductor device according to the present invention includes: emitter main electrodes each provided in each of a plurality of semiconductor chips; and main electrode emitter sense terminals directly connected to each of the emitter main electrodes and partially exposed outside a module, wherein each of the main electrode emitter sense terminals is located diagonally to each other, and a distance from each of the main electrode emitter sense terminals to each of the emitter main electrodes connected to each of the main electrode emitter sense terminals is smaller than a distance between the main electrode emitter sense terminals in a plan view outside the module.
Opening claim text (preview).
The invention claimed is: 1. A power semiconductor device, comprising: main electrodes each connected to corresponding ones of a plurality of semiconductor chips; main electrode emitter sense terminals each directly connected to a corresponding one of the main electrodes and partially exposed outside a module; and auxiliary emitter sense terminals indirectly connected to each of the main electrodes and partially exposed outside the module, wherein each of the main electrode emitter sense terminals is located diagonally to each other, and a distance from each of the main electrode emitter sense terminals to each of the main electrodes connected to each of the main electrode emitter sense terminals is smaller than a distance between the main electrode emitter sense terminals in a plan view outside the module, and each of the auxiliary emitter sense terminals is located diagonally to each other. 2. The power semiconductor device according to claim 1 , wherein each of the auxiliary emitter sense terminals is located opposite to the main electrode emitter sense terminals in a plan view outside the module. 3. The power semiconductor device according to claim 1 , wherein each of the main electrode emitter sense terminals is a cylindrical nut, and is connected to each of the main electrodes by swaging. 4. The power semiconductor device according to claim 1 , wherein each of the main electrode emitter sense terminals is a cylindrical nut, and is connected to each of the main electrodes with a screw. 5. The power semiconductor device according to claim 1 , wherein each of the main electrode emitter sense terminals includes a cylindrical nut, a lead wiring connected to the cylindrical nut, and a connector connected to the lead wiring, and the connector is connected to each of the main electrodes. 6. The power semiconductor device according to claim 1 , wherein each of the main electrode emitter sense terminals includes a cylindrical nut and an insert wiring connected to the cylindrical nut, and the insert wiring is connected to each of the main electrodes. 7. The power semiconductor device according to claim 1 , wherein each of the main electrode emitter sense terminals is an insert wiring connected to each of the main electrodes. 8. The power semiconductor device according to claim 1 , wherein each of the main electrode emitter sense terminals is a spring contact pin provided inside a cover of the module. 9. The power semiconductor device according to claim 8 , wherein the main electrodes and the spring contact pin are covered with a sealing agent. 10. The power semiconductor device according to claim 1 , wherein each of the semiconductor chips is made up of a wide bandgap semiconductor material. 11. The power semiconductor device according to claim 1 , wherein each of the main electrode emitter sense terminals is bent inside the module. 12. A power semiconductor device, comprising: main electrodes each connected to a corresponding one of a plurality of semiconductor chips; and main electrode emitter sense terminals each directly connected to a corresponding one of the main electrodes and partially exposed outside a module, wherein each of the main electrode emitter sense terminals is located diagonally to each other, and a distance from each of the main electrode emitter sense terminals to each of the main electrodes connected to each of the main electrode emitter sense terminals is smaller than a distance between the main electrode emitter sense terminals in a plan view outside the module, and each of the main electrode emitter sense terminals is a cylindrical nut, and is connected to each of the main electrodes by swaging. 13. A power semiconductor device, comprising: main electrodes each connected to a corresponding one of a plurality of semiconductor chips; and main electrode emitter sense terminals each directly connected to a corresponding one of the main electrodes and partially exposed outside a module, wherein each of the main electrode emitter sense terminals is located diagonally to each other, and a distance from each of the main electrode emitter sense terminals to each of the main electrodes connected to each of the main electrode emitter sense terminals is smaller than a distance between the main electrode emitter sense terminals in a plan view outside the module, and each of the main electrode emitter sense terminals is an insert wiring connected to each of the main electrodes.
Encapsulations, e.g. protective coatings · CPC title
Die-attach connectors and bond wires · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
characterised by the relative positions of pads or connectors relative to package parts · CPC title
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