Authenticating time sources using attestation-based methods
US-2020322075-A1 · Oct 8, 2020 · US
US12301339B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12301339-B2 |
| Application number | US-202017798955-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 21, 2020 |
| Priority date | Feb 21, 2020 |
| Publication date | May 13, 2025 |
| Grant date | May 13, 2025 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A method performs time-synchronization between a master clock and a plurality of slave clocks. The method performs a forward time-synchronization from the master clock to the plurality of slave clocks. Further, the method performs a reverse time-synchronization from the plurality of slave clocks to a corresponding plurality of validator clocks. In addition, the method validates the time-synchronization between the plurality of slave clocks, notably between the master clock and the plurality of slave clocks, based on the plurality of validator clocks.
Opening claim text (preview).
The invention claimed is: 1. A method for performing time-synchronization between a master clock and a plurality of slave clocks, the method comprising: performing a forward time-synchronization to time-synchronize respective slave clock times of the plurality of slave clocks to a master clock time of the master clock; performing a reverse time-synchronization to time-synchronize, for each of a plurality of validator clocks, a validator clock time to the slave clock time of a corresponding slave clock of the plurality of slave clocks; and validating a time-synchronization between the plurality of slave clocks by comparing the validator times of the plurality of validator clocks. 2. The method according to claim 1 , wherein forward time-synchronization is performed using precision-time-protocol, and/or reverse time-synchronization is performed using precision-time-protocol. 3. The method according to claim 1 , wherein forward time-synchronization and/or reverse time-synchronization are performed over an Ethernet communication network, and forward time-synchronization and reverse time-synchronization make use of different EtherTypes. 4. The method according to claim 1 , wherein a message used for reverse time-synchronization has a higher priority with regard to processing and/or transmission than a message used for forward time-synchronization. 5. The method according to claim 1 , wherein forward time-synchronization and/or reverse time-synchronization are performed over a communication network, and a validator comprising the plurality of validator clocks has a higher integrity level than at least one or more components of the communication network. 6. The method according to claim 5 , wherein the higher integrity level is a higher automotive-safety-integrity-level. 7. The method according claim 1 , wherein the plurality of validator clocks are implemented in a corresponding plurality of different time domains of a Synchronized Time-Base Manager of an automotive-open-system-architecture standard. 8. The method according to claim 1 , wherein validating the time-synchronization between the plurality of slave clocks comprises: comparing the validator times of the plurality of validator clocks; determining that the plurality of slave clocks are time-synchronized when the validator times of the plurality of validator clocks are operatively equal; and/or determining that the plurality of slave clocks are not time-synchronized when the validator times of at least two of the plurality of validator clocks are not operatively equal. 9. The method according to claim 1 , wherein the plurality of slave clocks are associated with a plurality of sensors, and each of the plurality of sensors is configured to provide sensor data with a time stamp generated by the associated slave clock. 10. The method according to claim 9 , further comprising: performing a forward time-synchronization to time-synchronize a fusion time of a fusion clock to the master time of the master clock, wherein the fusion clock is part of a fusion unit configured to perform sensor fusion of the sensor data provided by the plurality of sensors, and wherein the forward time-synchronization of the slave clocks is performed via the fusion unit; and performing a reverse time-synchronization to time-synchronize the validator time of a corresponding validator clock to the fusion time of the fusion clock.
Synchronization between nodes · CPC title
Bus networks · CPC title
Monitoring arrangements {(for SDH/SONET rings H04J3/085)} · CPC title
with centralised control, e.g. polling · CPC title
Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays (arrangements for monitoring round trip delays in packet switching networks H04L43/0864) · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.