A vehicle safety electronic control system

Patent metadata

Field	Value
Publication number	US-2018307635-A1
Application number	US-201615767564-A
Country	US
Kind code	A1
Filing date	Oct 12, 2016
Priority date	Oct 13, 2015
Publication date	Oct 25, 2018
Grant date	—

Abstract

A vehicle safety electronic control system ( 11 ) including master and slave microcontrollers ( 12, 13 ). The master microcontroller ( 12 ) is connected to a TDMA network bus, and the slave microcontroller ( 13 ) is connected to the master microcontroller ( 12 ) via a general purpose input/connection ( 14 ). Both microcontrollers ( 12, 13 ) are configured to operate schedule table based execution, and each has a respective synchronization counter. The master microcontroller ( 12 ) is configured to update its synchronization counter in response to a primary synchronization signal ( 19 ) from the network bus ( 10 ), and to issue a corresponding secondary synchronisation signal ( 20 ) to the slave microcontroller ( 13 ) via the general purpose input/output connection ( 14 ). The slave microcontroller ( 13 ) is configured to update its synchronization counter in response to the secondary synchronization signal ( 20 ) from the master microcontroller ( 12 ) such that the schedule tables of both microcontrollers ( 12, 13 ) are synchronized to the network bus ( 10 ).

First claim

1 . A vehicle safety electronic control system, comprising: a master microcontroller and a slave microcontroller; the master microcontroller being connected to a TDMA network bus, and the slave microcontroller being connected to the master microcontroller via a general purpose input/output connection; both of the microcontrollers being configured to operate schedule table based execution, and each of the microcontrollers having a respective synchronization counter, wherein the master microcontroller is configured to update a synchronization counter of the master microcontroller in response to receipt of a primary synchronization signal from the network bus, and to issue a corresponding secondary synchronization signal to the slave microcontroller via the general purpose input/output connection, the slave microcontroller being configured to update a synchronization of the slave microcontroller counter in response to receipt of the secondary synchronization signal from the master microcontroller such that the schedule tables of both of the microcontrollers are synchronized to the network bus.

2 . A control system according to claim 1 , comprising a plurality of the slave microcontrollers, wherein each all of the plurality of slave microcontrollers is connected to the master microcontroller via the respective general purpose input/output connection, and the master microcontroller is configured to issue a respective the secondary synchronization signal to each of the plurality of microcontrollers via the respective general purpose input/output connection.

3 . A control system according to claim 1 , further comprising, the master microcontroller is configured to issue the secondary synchronization signal in the form of an Interrupt Service Routine.

4 . A control system according to claim 1 , further comprising wherein the synchronization counters of the microcontrollers have identical resolutions.

5 . A control system according to claim 1 , further comprising wherein the slave microcontroller is not connected to the network bus directly.

6 . A control system according to claim 1 , further comprising wherein the microcontrollers are provided within a single integrated electronic control unit.

7 . A control system according to claim 1 , further comprising wherein the network bus is a FlexRay bus.

8 . A control system according to claim 1 , further comprising, wherein the microcontroller is configured to run an AUTOSAR-compliant operating system.

9 . A control system according to claim 1 , wherein each of the microcontrollers comprises a plurality of processing cores.

10 . A control system according to claim 1 , incorporated into a motor vehicle electronic safety system.

Assignees

• Autoliv Dev
• Autoliv Dev

Inventors

• Rota Alina

Classifications

• H04L2012/40241

  Flexray · CPC title

• G06F13/20 Primary

  for access to input/output bus · CPC title

• G06F9/52

  Program synchronisation; Mutual exclusion, e.g. by means of semaphores · CPC title

• G06F15/17325 Primary

  Synchronisation; Hardware support therefor (intertask synchronisation G06F9/52) · CPC title

• H04L12/40

  Bus networks · CPC title