Analog to digital converter apparatus with time continuous input and corresponding method

Patent metadata

Field	Value
Publication number	US-12301250-B2
Application number	US-202218069526-A
Country	US
Kind code	B2
Filing date	Dec 21, 2022
Priority date	Jan 3, 2022
Publication date	May 13, 2025
Grant date	May 13, 2025

Abstract

Provided is an analog to digital converter configured to receive a continuous input signal. The analog to digital converter includes an integrating block, comprising at least an integrating stage, which output is coupled to a flash analog to digital converter. The analog to digital converter apparatus includes a feedback path coupled to the output of said flash analog to digital converter. The feedback path includes at least a digital to analog conversion block which output is compared at least to the input signal to obtain an error signal which is brought as input to said integrating block. A control block is configured to perform control comprising at least a digital integration, is coupled between the output of said flash analog to digital converter and said feedback path.

First claim

The invention claimed is:

1. An analog-to-digital converter, comprising:
a flash analog-to-digital converter having an input and an output;
an integrator having an input configured to receive an error signal and an output that is coupled to the input of the flash analog-to-digital converter;
a feedback path including:
a digital-to-analog converter configured to generate an output signal that is compared to an input signal of the analog-to-digital converter to obtain the error signal; and

a controller coupled between the output of the flash analog-to-digital converter and the feedback path and configured to perform digital integration,
wherein the flash analog-to-digital converter generates a digital output having quantized values that are represented by a number of bits, and the flash analog-to-digital converter includes a plurality of comparators having different thresholds, respectively, and the thresholds cover a range of a flash analog-to-digital converter input signal, and the range of the flash analog-to-digital converter input signal is less than two to a power of the number of bits minus one.

2. The analog-to-digital converter according to claim 1 , wherein the number of bits is 10 and a number of the plurality of comparators is 17.

3. The analog-to-digital converter according to claim 1 , wherein the flash analog-to-digital converter is configured to perform a conversion characteristic from an analog input voltage to a digital code output, and the conversion characteristic includes voltage thresholds for the analog input voltage that are exponentially spaced.

4. The analog-to-digital converter according to claim 1 , wherein the flash analog-to-digital converter is configured to perform a conversion characteristic from an analog input voltage to a digital code output, and a resolution of the quantized values in the digital code output increases.

5. The analog-to-digital converter according to claim 4 , wherein the resolution of the quantized values in the digital code output increases exponentially.

6. The analog-to-digital converter according to claim 1 , the feedback path includes:
a first digital-to-analog converter having an input configured to receive the output signal that is a digital signal; and
a second digital-to-analog converter having input configured to receive the output signal.

7. The analog-to-digital converter according to claim 1 , wherein the controller is configured to perform proportional and integral control, and the controller includes an integral path and a proportional path other over which the controller applies a proportional constant.

8. The analog-to-digital converter according to claim 7 , wherein the proportional constant is to two to a power of minus two and a number of the plurality of comparators is 17.

9. An ultrasound detector for obstacle recognition based on time of flight evaluation, comprising:
an analog-to-digital converter including:
a flash analog-to-digital converter having an input and an output;
an integrator having an input configured to receive an error signal and an output that is coupled to the input of the flash analog-to-digital converter;
a feedback path including:
a digital-to-analog converter configured to generate an output signal that is compared to an input signal of the analog-to-digital converter to obtain the error signal; and

a controller coupled between the output of the flash analog-to-digital converter and the feedback path and configured to perform digital integration,
wherein the flash analog-to-digital converter generates a digital output having quantized values that are represented by a number of bits, and the flash analog-to-digital converter includes a plurality of comparators having different thresholds, respectively, and the thresholds cover a range of a flash analog-to-digital converter input signal, and the range of the flash analog-to-digital converter input signal is less than two to a power of the number of bits minus one.

10. The ultrasound detector according to claim 9 , wherein the number of bits is 10 and a number of the plurality of comparators is 17.

11. The ultrasound detector according to claim 9 , wherein the flash analog-to-digital converter is configured to perform a conversion characteristic from an analog input voltage to a digital code output, and the conversion characteristic includes voltage thresholds for the analog input voltage that are exponentially spaced.

12. The ultrasound detector according to claim 9 , wherein the flash analog-to-digital converter is configured to perform a conversion characteristic from an analog input voltage to a digital code output, and a resolution of the quantized values in the digital code output increases.

13. The ultrasound detector according to claim 12 , wherein the resolution of the quantized values in the digital code output increases exponentially.

14. A method for performing analog-to-digital conversion, comprising:
integrating, by an integrating stage, an error signal to generate a first signal;
performing analog-to-digital conversion, by a flash analog-to-digital converter, on the first signal to generate an output signal;
performing control including digitally integrating the output signal;
feeding back the integrated output signal to a digital-to-analog converter; and
comparing an output of the digital-to-analog converter to a continuous input signal to obtain the error signal,
wherein the flash analog-to-digital converter provides the output signal as a digital output having a number of bits, the flash analog-to-digital converter includes a plurality of comparators having different thresholds, respectively, and the thresholds cover a range of the first signal, and the range is less than two to a power of the number of bits minus one.

15. The method according to claim 14 , wherein the flash analog-to-digital converter has a conversion characteristic from analog input voltage to a digital code output that has voltage thresholds for the analog input voltage that are exponentially spaced.

16. The method according to claim 14 , wherein the flash analog-to-digital converter has a conversion characteristic from analog input voltage to a digital code output with a resolution of quantized values in the digital code output varying exponentially.

17. The method according to claim 14 , wherein performing the control includes:
performing a proportional control on a proportional path and integral control on an integral path, wherein a proportional constant is applied to the proportional path.

Assignees

• St Microelectronics Srl

Inventors

• Poletto Vanni
• Rogledi Nicola
• Leone Antonio Davide

Classifications

• H03M1/181

  in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values · CPC title

• G01S15/10

  using transmission of interrupted, pulse-modulated waves (determination of distance by phase measurement G01S15/32) · CPC title

• G01S7/526

  Receivers · CPC title

• H03M1/367

  Non-linear conversion · CPC title

• H03M1/361

  having a separate comparator and reference value for each quantisation level, i.e. full flash converter type · CPC title