Analog-to-digital converting circuits for dual conversion gain operation and operation methods of the same

Patent metadata

Field	Value
Publication number	US-12289557-B2
Application number	US-202318329322-A
Country	US
Kind code	B2
Filing date	Jun 5, 2023
Priority date	Oct 26, 2022
Publication date	Apr 29, 2025
Grant date	Apr 29, 2025

Abstract

Disclosed is an amplifier circuit including a first input terminal that receives a ramp signal, a second input terminal that receives a pixel signal, an output terminal that outputs an output signal, wherein the output signal is based on comparing the pixel signal and the ramp signal, a capacitor that is electrically connected between the output terminal and a ground terminal, a switch that is electrically connected with the capacitor, and a current source that outputs a power current. The pixel signal corresponds to a first conversion gain or a second conversion gain, and a value of the second conversion gain is higher than a value of the first conversion gain, and a bandwidth of the amplifier circuit is adjusted depending on whether the pixel signal corresponds to the first conversion gain or the second conversion gain.

First claim

What is claimed is:

1. An amplifier circuit, comprising:
a first input terminal that is configured to receive a ramp signal;
a second input terminal that is configured to receive a pixel signal;
an output terminal that is configured to output an output signal, wherein the output signal is based on comparing the pixel signal and the ramp signal;
a capacitor that is electrically connected between the output terminal and a ground terminal;
a first switch that is electrically connected with the capacitor; and
a current source that is configured to output a power current,
wherein the pixel signal corresponds to a first conversion gain or a second conversion gain, and a value of the second conversion gain is higher than a value of the first conversion gain, and
wherein a bandwidth of the amplifier circuit is adjusted depending on whether the pixel signal corresponds to the first conversion gain or the second conversion gain.

2. The amplifier circuit of claim 1 , wherein, when the first switch is turned on, the capacitor decreases the bandwidth of the amplifier circuit.

3. The amplifier circuit of claim 2 , wherein, when the pixel signal corresponds to the first conversion gain, the first switch is turned on or turned off in response to a first conversion gain enable signal, and
wherein, when the pixel signal corresponds to the second conversion gain, the first switch is turned on or turned off in response to a second conversion gain enable signal.

4. The amplifier circuit of claim 3 , wherein a time period during which the first conversion gain enable signal is maintained at a high signal level is different from a time period during which the second conversion gain enable signal is maintained at the high signal level.

5. The amplifier circuit of claim 1 , wherein the bandwidth of the amplifier circuit when the pixel signal corresponds to the first conversion gain is lower than the bandwidth of the amplifier circuit when the pixel signal corresponds to the second conversion gain.

6. The amplifier circuit of claim 1 , wherein a level of the power current is adjusted depending on whether the pixel signal corresponds to the first conversion gain or the second conversion gain.

7. The amplifier circuit of claim 6 , wherein the current source includes:
a first current source that is configured to output a first sub-power current;
a second current source that is configured to output a second sub-power current; and
a second switch that is electrically connected with the second current source,
wherein, when the second switch is turned on, the power current is equal to a sum of the first sub-power current and the second sub-power current, and
wherein, when the second switch is turned off, the power current is equal to the first sub-power current.

8. The amplifier circuit of claim 7 , wherein, when the pixel signal corresponds to the first conversion gain, the second switch is turned on or turned off in response to a first conversion gain enable signal, and
wherein, when the pixel signal corresponds to the second conversion gain, the second switch is turned on or turned off in response to a second conversion gain enable signal.

9. The amplifier circuit of claim 8 , wherein a time period during which the first conversion gain enable signal is maintained at a high signal level is different from a time period during which the second conversion gain enable signal is maintained at the high signal level.

10. An image sensor comprising:
a pixel array including a plurality of pixels, wherein the pixel array is configured to output a first pixel signal that corresponds to a first conversion gain and a second pixel signal that corresponds to a second conversion gain from the plurality of pixels that share a floating diffusion region;
a first plurality of analog-to-digital converting (ADC) circuits, wherein each of the first plurality of ADC circuits is configured to output a first digital signal based on the first pixel signal and a first ramp signal; and
a second plurality of ADC circuits, wherein each of the second plurality of ADC circuits is configured to output a second digital signal based on the second pixel signal and a second ramp signal,
wherein a value of the second conversion gain is higher than a value of the first conversion gain, and
wherein a first bandwidth of the first plurality of ADC circuits and a second bandwidth of the second plurality of ADC circuits are adjusted independently of each other.

11. The image sensor of claim 10 , wherein the first bandwidth is less than the second bandwidth.

12. The image sensor of claim 10 , wherein each of the first plurality of ADC circuits includes a first amplifier that is configured to generate a first output signal based on a result of comparing the first pixel signal and the first ramp signal,
wherein each of the second plurality of ADC circuits includes a second amplifier that is configured to generate a second output signal based on a result of comparing the second pixel signal and the second ramp signal, and
wherein the first bandwidth is determined depending on a bandwidth of the first amplifier, and the second bandwidth is determined depending on a bandwidth of the second amplifier.

13. The image sensor of claim 12 , wherein each of the first amplifier and the second amplifier includes:
a capacitor that is electrically connected between an output terminal and a ground terminal; and
a first switch that is electrically connected with the capacitor, and
wherein, when the first switch of each of the first and second amplifiers is turned on, the capacitor of the first amplifier is configured to decrease the bandwidth of the first amplifier, and the capacitor of the second amplifier is configured to decrease the bandwidth of the second amplifier.

14. The image sensor of claim 13 , wherein the first switch of the first amplifier is turned on or turned off in response to a first conversion gain enable signal, and the first switch of the second amplifier is turned on or turned off in response to a second conversion gain enable signal, and
wherein a time period during which the first conversion gain enable signal is maintained at a high signal level is different from a time period during which the second conversion gain enable signal is maintained at the high signal level.

15. The image sensor of claim 12 , wherein the first amplifier operates based on a first power current, and the second amplifier operates based on a second power current,
wherein each of the first amplifier and the second amplifier includes:
a first current source that is configured to output a first sub-power current;
a second current source that is configured to output a second sub-power current; and
a second switch that is electrically connected with the second current source, and
wherein, when the second switch is turned on, each of the first power current and the second power current is equal to a sum of the first sub-power current and the second sub-power current, and
wherein, when the second switch is turned off, each of the first power current and the second power current is equal to the first sub-power current.

16. The image sensor of claim 15 , wherein the second switch of the first amplifier is turned on or turned off in response to a first conversion gain enable signal, and the second switch of the second amplifier is turned on or turned off in response to a second conversion gain enable signal, and
wherein a time period during which the first conversion gain enable signal is maintained at a high signal level is different from a time period duri

Assignees

• Samsung Electronics Co Ltd

Inventors

• Jun Jaehoon

Classifications

• H03M1/18

  Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging · CPC title

• H03G3/00

  Gain control in amplifiers or frequency changers · CPC title

• H04N25/709

  Circuitry for control of the power supply · CPC title

• H03M1/1205

  Multiplexed conversion systems · CPC title

• H04N25/772

  comprising A/D, V/T, V/F, I/T or I/F converters · CPC title