Polishing head, polishing apparatus, and method of manufacturing semiconductor wafer

US12285840B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12285840-B2
Application numberUS-201917600189-A
CountryUS
Kind codeB2
Filing dateDec 27, 2019
Priority dateApr 5, 2019
Publication dateApr 29, 2025
Grant dateApr 29, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A polishing head includes a first ring-shaped member having an opening; a plate-shaped member that closes the opening on an upper side of the first ring-shaped member; a membrane that closes the opening on a lower side of the first ring-shaped member; a back pad adhered to a lower surface of the membrane; and a second ring-shaped member located below the back pad and having an opening that holds a polishing target workpiece. A space formed by closing the opening of the first ring-shaped member by the plate-shaped member and the membrane includes: a central region; and an outer peripheral region partitioned from the central region by a partition, and an inner peripheral edge region of the second ring-shaped member is located vertically below an outer peripheral edge of the outer peripheral region. A polishing apparatus includes the polishing head, and is used in a method of manufacturing a semiconductor wafer.

First claim

Opening claim text (preview).

The invention claimed is: 1. A polishing head comprising: a first ring-shaped member having an opening; a plate-shaped member that closes the opening on an upper side of the first ring-shaped member; a membrane that closes the opening on a lower side of the first ring-shaped member; a back pad adhered to a lower surface of the membrane, such that no space is formed between the back pad and the membrane; and a second ring-shaped member located below the back pad and having an opening that holds a polishing target workpiece, wherein a space, formed by closing the opening of the first ring-shaped member by the plate-shaped member and the membrane, comprises: a central region; and an outer peripheral region partitioned from the central region by a partition, an inner peripheral edge region of the second ring-shaped member is located vertically below an outer peripheral edge of the outer peripheral region, and the partition is connected to the plate-shaped member. 2. The polishing head according to claim 1 , wherein the back pad is disposed between an outer peripheral portion on the lower surface of the membrane and an annular upper surface of the second ring-shaped member. 3. The polishing head according to claim 2 , which comprises: an introducing path that introduces gas into the central region; and an introducing path that introduces gas into the outer peripheral region. 4. The polishing head according to claim 1 , which comprises: an introducing path that introduces gas into the central region; and an introducing path that introduces gas into the outer peripheral region. 5. A polishing apparatus comprising: the polishing head according to claim 1 ; a polishing pad; and a surface plate that supports the polishing pad. 6. A method of manufacturing a semiconductor wafer, the method comprising polishing a surface of a polishing target wafer with the polishing apparatus according to claim 5 to form a polished surface. 7. The method of manufacturing a semiconductor wafer according to claim 6 , wherein the polishing head comprises: an introducing path that introduces gas into the central region; and an introducing path that introduces gas into the outer peripheral region. 8. The method of manufacturing a semiconductor wafer according to claim 6 , wherein the back pad is disposed between an outer peripheral portion on the lower surface of the membrane and an annular upper surface of the second ring-shaped member. 9. The method of manufacturing a semiconductor wafer according to claim 8 , wherein the polishing head comprises: an introducing path that introduces gas into the central region; and an introducing path that introduces gas into the outer peripheral region. 10. The polishing apparatus according to claim 5 , wherein the back pad is disposed between an outer peripheral portion on the lower surface of the membrane and an annular upper surface of the second ring-shaped member. 11. The polishing apparatus according to claim 10 , wherein the polishing head comprises: an introducing path that introduces gas into the central region; and an introducing path that introduces gas into the outer peripheral region. 12. The polishing apparatus according to claim 5 , wherein the polishing head comprises: an introducing path that introduces gas into the central region; and an introducing path that introduces gas into the outer peripheral region. 13. The polishing head according to claim 1 , wherein a height of the space is 3.5 mm to 5.5 mm in a state in which gas is not introduced into the space.

Assignees

Inventors

Classifications

  • of semiconductor materials · CPC title

  • by polishing · CPC title

  • B24B37/102Primary

    the workpieces or work carriers being able to rotate freely due to a frictional contact with the lapping tool · CPC title

  • for single side lapping · CPC title

  • B24B37/32Primary

    Retaining rings · CPC title

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Frequently asked questions

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What does patent US12285840B2 cover?
A polishing head includes a first ring-shaped member having an opening; a plate-shaped member that closes the opening on an upper side of the first ring-shaped member; a membrane that closes the opening on a lower side of the first ring-shaped member; a back pad adhered to a lower surface of the membrane; and a second ring-shaped member located below the back pad and having an opening that hold…
Who is the assignee on this patent?
Sumco Corp
What technology area does this patent fall under?
Primary CPC classification B24B37/102. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Apr 29 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).