Backlight module, display device, and method for driving backlight unit

US12283254B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12283254-B2
Application numberUS-202318373062-A
CountryUS
Kind codeB2
Filing dateSep 26, 2023
Priority dateFeb 28, 2023
Publication dateApr 22, 2025
Grant dateApr 22, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A backlight module includes a pixel driver integrated circuit (PDIC) configured to generate a switch control signal and a pulse control signal, the pulse control signal including timing information and dimming data, a pixel integrated circuit (PIC) configured to generate a pulse modulation signal based on the pulse control signal, a switch group configured to transfer a driving voltage based on the switch control signal, and a backlight unit (BLU) including a first end connected to the switch group and a second end connected to the PIC, the BLU configured to emit light on a panel based on the driving voltage and the pulse modulation signal, where the PDIC is configured to generate the switch control signal and the pulse control signal such that a light emitting diode emits light at a time point at which a pixel of the panel operates.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for driving a backlight unit (BLU), the method comprising: controlling a first switch and a second switch to alternately open and close based on a vertical synchronization signal of a current frame; closing the first switch at a first time point in the current frame; based on the first switch being closed and the second switch being open: generating, by a first pixel integrated circuit (PIC), a first pulse modulation signal based on a first packet output from a pixel driver integrated circuit (PDIC) and applying the first pulse modulation signal to a first backlight unit (BLU) line connected to the first PIC and corresponding to a first light emitting diode; and generating, by a second PIC, a second pulse modulation signal based on a second packet output from the PDIC and applying the second pulse modulation signal to a second BLU line connected to the second PIC and corresponding to a second light emitting diode; closing the second switch at a second time point in the current frame; and based on the second switch being closed and the first switch being open: generating, by the first PIC, a third pulse modulation signal based on the first packet output from the PDIC and applying the third pulse modulation signal to a third BLU line connected to the first PIC and corresponding to a third light emitting diode; and generating, by the second PIC, a fourth pulse modulation signal based on the second packet output from the PDIC and applying the fourth pulse modulation signal to a fourth BLU line connected to the second PIC and corresponding to a fourth light emitting diode. 2. A backlight module, comprising: a pixel driver integrated circuit (PDIC) configured to generate a switch control signal and a pulse control signal, the pulse control signal comprising timing information and dimming data; a pixel integrated circuit (PIC) configured to generate a pulse modulation signal based on the pulse control signal; a switch group configured to transfer a driving voltage based on the switch control signal; and a backlight unit (BLU) comprising a first end connected to the switch group and a second end connected to the PIC, the BLU configured to emit light on a panel based on the driving voltage and the pulse modulation signal, wherein the PDIC is configured to generate the switch control signal and the pulse control signal such that a light emitting diode emits light at a time point at which a pixel of the panel operates. 3. The backlight module of claim 2 , wherein the switch group comprises a first switch and a second switch; wherein the PDIC is further configured to generate, in one frame display period, a first switch control signal for controlling the first switch and a second switch control signal for controlling the second switch; and wherein the first switch control signal and the second switch control signal are mutually exclusive. 4. The backlight module of claim 3 , wherein the PDIC is further configured to generate the first switch control signal and the second switch control signal based on a length of a subframe period. 5. The backlight module of claim 3 , wherein the BLU comprises a first light emitting diode connected to the first switch and a second light emitting diode connected to the second switch; and wherein the PIC is further configured to: generate a first pulse modulation signal causing the first light emitting diode to emit light at a time point at which the first switch is closed; and generate a second pulse modulation signal causing the second light emitting diode to emit light at a time point at which the second switch is closed. 6. The backlight module of claim 2 , wherein the PDIC is further configured to generate the timing information such that a level transition time point of the pulse modulation signal matches a level transition time point of the switch control signal. 7. The backlight module of claim 6 , wherein the PDIC is further configured to generate the timing information such that a time point at which the pulse modulation signal transitions from a low level to a high level matches a time point at which the switch control signal transitions from a first level to a second level. 8. The backlight module of claim 2 , wherein the BLU further comprises a first light emitting diode provided in a first line and a second light emitting diode provided on a second line that is below the first line; wherein the PIC comprises a first PIC configured to control the first light emitting diode and a second PIC configured to control the second light emitting diode; and wherein the PDIC is further configured to: output a first pulse control signal comprising first timing information to the first PIC, and output a second pulse control signal comprising second timing information to the second PIC, the second timing information being different from the first timing information. 9. The backlight module of claim 8 , wherein the PDIC is further configured to generate the first pulse control signal and the second pulse control signal based on a frame display region. 10. The backlight module of claim 9 , wherein the PDIC is further configured to determine the frame display region based on a quantity of horizontal lines and a quantity of slits on which a plurality of light emitting diodes are provided in the BLU. 11. The backlight module of claim 8 , wherein the PDIC is further configured to generate the first pulse control signal and the second pulse control signal, such that the first PIC outputs a first pulse modulation signal corresponding to a first frame at a first time point, and the second PIC outputs a second pulse modulation signal corresponding to the first frame or a third pulse modulation signal corresponding to a second frame preceding the first frame at the first time point. 12. The backlight module of claim 11 , wherein the PDIC is further configured to, based on generating the second pulse control signal such that the second PIC outputs the third pulse modulation signal at the first time point, generate the second pulse control signal such that the second PIC outputs a fourth pulse modulation signal corresponding to the first frame at a second time point later than the first time point by a predetermined delay. 13. The backlight module of claim 12 , wherein a PDIC is further configured to determine the predetermined delay based on a length of a subframe period. 14. The backlight module of claim 8 , wherein the PDIC is further configured to: determine a pause period in one frame display period; and generate the first pulse control signal and the second pulse control signal such that the first PIC and the second PIC similarly operate based on the first pulse control signal and the second pulse control signal in the pause period. 15. A display device, comprising: a controller configured to generate a backlight data and a driving control signal based on an image signal; a driver circuit configured to generate, based on the driving control signal, a scan signal and a pixel signal; a panel comprising a plurality of pixels, the panel configured to, based on the scan signal and the pixel signal, receive light and display an image; and a backlight module comprising: a backlight unit comprising a first backlight unit (BLU) line, a second BLU line, a third BLU line and a fourth BLU line, wherein the first BLU line, the second BLU line, the third BLU line and the fourth BLU line are located in different rows; a first switch connected to the first BLU line and the second BLU line; and a second switch connected to the third BLU line and the f

Assignees

Inventors

Classifications

  • by time modulation of the brightness of the illumination source · CPC title

  • G09G3/3426Primary

    the different display panel areas being distributed in two dimensions, e.g. matrix · CPC title

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Frequently asked questions

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What does patent US12283254B2 cover?
A backlight module includes a pixel driver integrated circuit (PDIC) configured to generate a switch control signal and a pulse control signal, the pulse control signal including timing information and dimming data, a pixel integrated circuit (PIC) configured to generate a pulse modulation signal based on the pulse control signal, a switch group configured to transfer a driving voltage based on…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3426. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 22 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).