Low power current integration DAC ramp settling assist circuit

Patent metadata

Field	Value
Publication number	US-12250485-B2
Application number	US-202217659041-A
Country	US
Kind code	B2
Filing date	Apr 13, 2022
Priority date	Apr 13, 2022
Publication date	Mar 11, 2025
Grant date	Mar 11, 2025

Abstract

A ramp generator includes an operational amplifier having an output to generate a ramp signal. An integration current source is coupled to a first input and a reference voltage is coupled to a second input of the operational amplifier. A feedback capacitor and a reset switch are coupled between the first input and the output of the operational amplifier. The reset switch is turned on to reset the ramp generator. A ramp event is configured to be generated in the ramp signal at the output of the operational amplifier in response to the reset switch being turned off. An assist current source is coupled between the output of the operational amplifier and ground. The assist current source is configured to conduct an assist current from the output of the operational amplifier to ground in response to the reset switch being turned off.

First claim

What is claimed is:

1. A ramp generator, comprising:
an operational amplifier having a first input, a second input, and an output to generate a ramp signal;
an integration current source coupled to the first input of the operational amplifier;
a reference voltage coupled to the second input of the operational amplifier;
a feedback capacitor coupled between the first input and the output of the operational amplifier;
a reset switch coupled between the first input and the output of the operational amplifier, wherein the reset switch is configured to be turned on to reset the ramp generator, wherein a ramp event is configured to be generated in the ramp signal at the output of the operational amplifier in response to the reset switch being turned off; and
an assist current source coupled between the output of the operational amplifier and ground, wherein the assist current source is configured to conduct an assist current from the output of the operational amplifier to ground in response to the reset switch being turned off, and wherein the feedback capacitor is coupled between the assist current source and the first input of the operational amplifier.

2. The ramp generator of claim 1 , further comprising a reference capacitor coupled between the second input of the operational amplifier and ground.

3. The ramp generator of claim 1 , further comprising an output capacitor coupled between the output of the operational amplifier and ground.

4. The ramp generator of claim 3 , wherein the assist current is substantially equal to an integration current conducted through the integration current source multiplied by a ratio of a capacitance of the output capacitor and a capacitance of the feedback capacitor.

5. The ramp generator of claim 3 , wherein the assist current conducted through the assist current source is substantially equal to a discharge current from the output capacitor during the ramp event that is configured to be generated in the ramp signal at the output of the operational amplifier in response to the reset switch being turned off.

6. The ramp generator of claim 1 , wherein the assist current is zero when the reset switch is configured to be turned on to reset the ramp generator.

7. The ramp generator of claim 6 , further comprising an assist current switch coupled to the assist current source, wherein the assist current switch is configured to be turned off when the reset switch is configured to be turned on, wherein the assist current switch is configured to be turned on when the reset switch is configured to be turned off.

8. The ramp generator of claim 1 , wherein the reset switch is coupled between the assist current source and the first input of the operational amplifier.

9. The ramp generator of claim 1 , wherein the reset switch and the feedback capacitor are arranged in parallel to one another between the assist current source and the first input of the operation amplifier.

10. The ramp generator of claim 1 , wherein the reset switch and the feedback capacitor are arranged in parallel to one another between the integration current source and the assist current source.

11. An imaging system, comprising:
an array of pixels to receive image light and generate an image charge voltage signal in response; and
readout circuitry coupled to receive the image charge voltage signal from the array of pixels and provide a digital representation of the image charge voltage signal in response, the readout circuitry including a comparator to receive the image charge voltage signal, compare the image charge voltage signal to a ramp signal from a ramp generator, and provide the digital representation of the image charge voltage signal in response, wherein the ramp generator comprises:
an operational amplifier having a first input, a second input, and an output to generate the ramp signal;
an integration current source coupled to the first input of the operational amplifier;
a reference voltage coupled to the second input of the operational amplifier;
a feedback capacitor coupled between the first input and the output of the operational amplifier;
a reset switch coupled between the first input and the output of the operational amplifier, wherein the reset switch is configured to be turned on to reset the ramp generator, wherein a ramp event is configured to be generated in the ramp signal at the output of the operational amplifier in response to the reset switch being turned off; and
an assist current source coupled between the output of the operational amplifier and ground, wherein the assist current source is configured to conduct an assist current from the output of the operational amplifier to ground in response to the reset switch being turned off, and wherein the feedback capacitor is coupled between the assist current source and the first input of the operational amplifier.

12. The imaging system of claim 11 , wherein the ramp generator further comprises a reference capacitor coupled between the second input of the operational amplifier and ground.

13. The imaging system of claim 11 , wherein the ramp generator further comprises an output capacitor coupled between the output of the operational amplifier and ground.

14. The imaging system of claim 13 , wherein the assist current is substantially equal to an integration current conducted through the integration current source multiplied by a ratio of a capacitance of the output capacitor and a capacitance of the feedback capacitor.

15. The imaging system of claim 13 , wherein the assist current conducted through the assist current source is substantially equal to a discharge current from the output capacitor during the ramp event that is configured to be generated in the ramp signal at the output of the operational amplifier in response to the reset switch being turned off.

16. The imaging system of claim 11 , wherein the assist current is zero when the reset switch is configured to be turned on to reset the ramp generator.

17. The imaging system of claim 16 , wherein the ramp generator further comprises an assist current switch coupled to the assist current source, wherein the assist current switch is configured to be turned off when the reset switch is configured to be turned on, wherein the assist current switch is configured to be turned on when the reset switch is configured to be turned off.

18. The imaging system of claim 11 , wherein the reset switch is coupled between the assist current source and the first input of the operational amplifier.

19. The imaging system of claim 11 , wherein the reset switch and the feedback capacitor are arranged in parallel to one another between the assist current source and the first input of the operation amplifier.

20. The imaging system of claim 11 , wherein the reset switch and the feedback capacitor are arranged in parallel to one another between the integration current source and the assist current source.

Assignees

• Omnivision Tech Inc

Inventors

• Sun Tao

Classifications

• H04N25/78 Primary

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H03K4/56

  using a semiconductor device with negative feedback through a capacitor, e.g. Miller integrator · CPC title

• H03K4/501

  the starting point of the flyback period being determined by the amplitude of the voltage across the capacitor, e.g. by a comparator · CPC title

• H03M1/123

  Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters · CPC title

• H03M1/56

  Input signal compared with linear ramp · CPC title