Estimation of life of switching devices

Patent metadata

Field	Value
Publication number	US-12248016-B2
Application number	US-202218079707-A
Country	US
Kind code	B2
Filing date	Dec 12, 2022
Priority date	Dec 17, 2021
Publication date	Mar 11, 2025
Grant date	Mar 11, 2025

Abstract

A health signature of each switching device in a control system is estimated using system parameters such as a DC-link voltage, three-phase voltages, three-phase currents, and temperature. The switching devices can be implemented as transistors, and a health signature for each transistor may be an on-state resistance or an on-state voltage of the transistors. For example, the on-state resistance for a metal-oxide-semiconductor field-effect transistor (MOSFET) functions as a health signature. Alternatively, the on-state voltage is used as a health signature for an insulated-gate bipolar transistor (IGBT). Additionally, a junction temperature is estimated for each transistor. Using the estimated health signatures and the junction temperatures, the remaining useful life of each transistor is estimated.

First claim

What is claimed is:

1. A method of estimating a remaining useful life (RUL) of a switching system that includes a plurality of p-type switching devices and a plurality of n-type switching devices, the switching system used in a three-phase control system, the method comprising:
estimating a health signature of the switching system while the switching system is in use to control a three-phase motor, including:
determining the health signature of each of the p-type switching devices during positive peaks of a three-phase current associated with the three-phase control system;
determining the health signature of each of the n-type switching devices during negative peaks of the three-phase current associated with the three-phase control system;

estimating a junction temperature of each of the plurality of p-type switching devices and the plurality of n-type switching devices;
based on a relationship between the power dissipation and the junction temperature with respect to a pre-defined operating condition at a pre-defined temperature, normalizing the health signature to generate a normalized health signature;
calculating a health state estimation matrix by modeling the degradation of the normalized health signature over a time interval using Kalman filtering;
using the health state estimation matrix, determining a health state of the switching system at a first time;
forecasting, based on the health state and the health state estimation matrix, a time at which the each of the plurality of p-type switching devices and each of the plurality of n-type switching devices within the switching system reach a failure criterion; and
causing a notification to be provided to an output device, the notification including the time at which the each of the plurality of p-type switching devices and each of the plurality of n-type switching devices is forecasted to reach the failure criterion.

2. The method of claim 1 , wherein estimating the junction temperature of each of the plurality of p-type switching devices and the plurality of n-type switching devices comprises estimating the junction temperature of the each of the plurality of p-type switching devices and the plurality of n-type switching devices using an equation T j =T c +θjcP, where T j represents the junction temperature, T c represents a case temperature θjc represents a junction to case thermal resistance, and P represents the power dissipation.

3. The method of claim 1 , further comprising:
calculating an observed degradation over a time interval based on a rate of change of the health signature over the time interval; and
correcting the health state of the switching system at the first time based on the observed degradation.

4. The method of claim 1 , wherein the notification further includes a time for ordering a spare switching device to replace a switching device of the plurality of p-type switching devices or the plurality of n-type switching devices before the switching device reaches the failure criterion.

5. The method of claim 1 , wherein the health state of the switching device system at the first time is represented by the equation: x t =F t−1 x t−1 for each of switching device of the plurality of p-type switching devices and the plurality of n-type switching devices included within the switching system,
wherein, x t represents a health state of the switching device at the first time “t”, x t−1 represents the degradation state of the switching device at a previous time “t−1”; and F t−1 represents the health state estimation matrix.

6. The method of claim 1 , wherein the switching system is composed of metal-oxide semiconductor field-effect transistor (MOSFET) switching devices.

7. The method of claim 6 , wherein the health signature of the switching system is an on-state resistance for each of the MOSFET switching devices within the switching system, wherein the on-state resistance for a MOSFET switching device of the MOSFET switching devices is calculated based on a phase voltage and a phase current associated with the MOSFET switching device.

8. The method of claim 7 , wherein estimating the on-state resistance for the MOSFET switching device comprises:
estimating the on-state resistance at a positive peak of a positive half-cycle of the phase current using an equation:

R

D
⁢
S
⁢
O
⁢
N

,

S
⁢
n

=

v

DS
,
Sn

i

DS
,
Sn

=

v

d
⁢
c

-

v
x

i
x

,

where R DSON represents the on-state resistance, v dc represents a direct current (DC)-link capacitor voltage, s n represents the MOSFET switching device, v x represents the phase voltage associated with the MOSFET switching device, and i x represents the phase current associated with the MOSFET switching device.

9. The method of claim 7 , wherein estimating the on-state resistance for the MOSFET switching device comprises:
estimating the on-state resistance at a negative peak of a negative half-cycle of the phase current using an equation:

R

D
⁢
SON

,
Sn

=

v

DS
,
Sn

i

DS
,
Sn

=

v

d
⁢
c

-

v
x

Assignees

• Eaton Intelligent Power Ltd

Inventors

• Somayajula Deepak Balaji
• Narula Swati
• Srikantam Sravanthi
• Mohanty Satish
• Bhalwankar Chaitanya Pradeep
• Moody Stuart John
• Peck Daniel
• Sreenilayam Raveendran Ranjith Kumar

Classifications

• G01R31/2874

  related to temperature · CPC title

• G05B23/0283 Primary

  Predictive maintenance, e.g. involving the monitoring of a system and, based on the monitoring results, taking decisions on the maintenance schedule of the monitored system; Estimating remaining useful life [RUL] (preventive maintenance, i.e. planning maintenance according to the available resources without monitoring the system G06Q10/06) · CPC title

• G01R31/2642 Primary

  Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests · CPC title

• G01R31/2608

  for testing bipolar transistors · CPC title

• G01R31/2621

  for testing field effect transistors, i.e. FET's · CPC title