Multilayer ceramic capacitor

US12237111B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12237111-B2
Application numberUS-202318509396-A
CountryUS
Kind codeB2
Filing dateNov 15, 2023
Priority dateMay 18, 2021
Publication dateFeb 25, 2025
Grant dateFeb 25, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer ceramic capacitor includes a capacitor main body including a multilayer body and external electrodes, the multilayer body including dielectric layers and internal electrode layers stacked alternately, each of the external electrodes being provided on an end surface in a length direction of the multilayer body and being connected to the internal electrode layers, and two interposers on one surface in a stacking direction of the capacitor main body and spaced apart from each other in the length direction, the interposers including bonding surfaces bondable to the one surface of the capacitor main body and including inner edge portions which are opposite to each other and each having a length longer than a length in a width direction of the multilayer body.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer ceramic capacitor comprising: a capacitor main body including a multilayer body and external electrodes, the multilayer body including dielectric layers and internal electrode layers laminated therein, two main surfaces opposed to each other in a lamination direction, two side surfaces opposed to each other in a width direction intersecting the lamination direction, and two end surfaces opposed to each other in a length direction intersecting the lamination direction and the width direction, the external electrodes being each provided on a corresponding one of the two end surfaces and connected to the internal electrode layers; and a pair of interposers provided on one surface among the two main surfaces and the two side surfaces of the capacitor main body, and spaced apart from and opposed to each other in the length direction; wherein the pair of interposers each include a bonding surface to be bonded to the capacitor main body; and the bonding surface included in each of surfaces of the pair of interposers which are opposed to each other includes an inner edge portion having a length longer than a length of the multilayer body in the width direction. 2. The multilayer ceramic capacitor according to claim 1 , wherein the inner edge portion of the bonding surface includes a curved portion. 3. The multilayer ceramic capacitor according to claim 1 , wherein the inner edge portion of each of the pair of interposers has a line symmetrical shape with respect to a straight line passing through a center in the length direction and extending in the width direction, as seen from a plane extending in the width direction and the length direction. 4. The multilayer ceramic capacitor according to claim 1 claim 2 , wherein the inner edge portion of each of the pair of interposers has a line symmetrical shape with respect to a straight line passing through a center in the length direction and extending in the width direction, as seen from a plane extending in the width direction and the length direction. 5. The multilayer ceramic capacitor according to claim 1 , wherein when defining a length of the multilayer body as L, and defining a difference between a longest portion and a shortest portion in the length direction of the bonding surface as L 1 , L×0.05≤L 1 ≤L×0.40 is satisfied. 6. The multilayer ceramic capacitor according to claim 1 , wherein a relationship between a length L 2 of a shortest portion and a length L 3 of a longest portion in the length direction of the bonding surface is L 2 ×1.10≤L 3 ≤L 2 ×1.40. 7. The multilayer ceramic capacitor according to claim 1 , wherein when defining a width in the width direction of the multilayer body as W, the length of the inner edge portion is about 1.1 W or more and about 2 W or less.

Assignees

Inventors

Classifications

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence) · CPC title

  • Leadless chip, e.g. chip capacitor or resistor · CPC title

  • Non-printed capacitor · CPC title

  • having edge contacts, e.g. leadless chip capacitors, chip carriers · CPC title

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What does patent US12237111B2 cover?
A multilayer ceramic capacitor includes a capacitor main body including a multilayer body and external electrodes, the multilayer body including dielectric layers and internal electrode layers stacked alternately, each of the external electrodes being provided on an end surface in a length direction of the multilayer body and being connected to the internal electrode layers, and two interposers…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 25 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).