Pixel circuitry and operation for memory-containing electronic display

Patent metadata

Field	Value
Publication number	US-12230211-B2
Application number	US-202318239673-A
Country	US
Kind code	B2
Filing date	Aug 29, 2023
Priority date	May 8, 2018
Publication date	Feb 18, 2025
Grant date	Feb 18, 2025

Abstract

A pixel circuit for an electronic display may include a memory to store a digital data signal indicative of a value within a data range. The pixel circuit may also include a light-emitting diode to emit light based at least in part on the digital data signal. The pixel circuit may also include an initialization transistor to initialize the pixel circuit before the light-emitting diode emits light and a driving transistor to activate based at least in part on the digital data signal.

First claim

What is claimed is:

1. An electronic display, comprising:
a controller configured to transmit image data and a voltage; and
a pixel configured to receive the image data and the voltage, wherein the pixel comprises:
a capacitor that outputs a gate voltage based on the voltage;
a current drive comprising a driving transistor that outputs a current that varies based on the gate voltage;
a memory configured to store the image data and transmit a control signal based on the image data; and
a switching transistor that
receives the current from the driving transistor of the current drive and the control signal from the memory, and
causes a light-emitting diode to emit light at least in part by transmitting the current to the light-emitting diode in response to the control signal.

2. The electronic display of claim 1 , wherein the switching transistor receives the current from the current drive at a source and receives the control signal at a gate.

3. The electronic display of claim 1 , comprising a plurality of pixels including the pixel, wherein the plurality of pixels correspond to respective color channels.

4. The electronic display of claim 1 , wherein the controller is configured to generate a plurality of control signals to operate the pixel to emit light according to binary pulse width modulated emission.

5. The electronic display of claim 1 , wherein the controller is configured to generate a plurality of control signals to operate the pixel to emit light according to reordered binary data.

6. The electronic display of claim 1 , wherein the memory receives data from a smart buffer.

7. The electronic display of claim 1 , wherein the capacitor is configured to enable compensation for a change of threshold voltage.

8. The electronic display of claim 1 , wherein the pixel comprises a voltage drive having a transistor with a first drain coupled to a second drain of the switching transistor.

9. The electronic display of claim 8 , wherein the controller is configured to enable the voltage drive for a period of time corresponding to a threshold amount of voltage being delivered to an anode of the light-emitting diode.

10. A circuit comprising:
a capacitor that receives a voltage in response to a selection control signal and outputs a gate voltage based on the voltage;
a current drive comprising a driving transistor and coupled to the capacitor, wherein the driving transistor of the current drive outputs a current that varies based on the gate voltage;
a memory configured to store image data and transmit a control signal based on the image data; and
a switching transistor that
receives the current from the driving transistor of the current drive and the control signal from the memory, and
causes a light-emitting device to emit light at least in part by transmitting the current to the light-emitting device in response to the control signal.

11. The circuit of claim 10 , comprising a voltage drive coupled to the switching transistor and the light-emitting device, wherein a controller is configured to enable the voltage drive for a period of time corresponding to a threshold amount of voltage being delivered to an anode of the light-emitting device.

12. The circuit of claim 10 , wherein the light-emitting device comprises a light-emitting diode.

13. The circuit of claim 10 , wherein the control signal is received by the switching transistor after the capacitor receives the voltage.

14. The circuit of claim 10 , wherein the capacitor is configured to enable compensation for a change of threshold voltage.

15. The circuit of claim 10 , wherein the voltage corresponds to a different voltage value than the image data.

16. A method, comprising:
transmitting, via a controller, one or more bits of image data into a memory of a pixel, wherein the image data corresponds to an image frame to be presented;
determining, via the controller, a data voltage to provide to the pixel;
performing, via the controller, a programming process to program one or more voltages of one or more nodes of the pixel based on the data voltage; and
performing, via the controller, an emission process based on the one or more voltages at least in part by causing the memory to output a control signal to a gate of a switching transistor based on the one or more bits, wherein the performance of the emission process causes light to be emitted from a light-emitting device of the pixel.

17. The method of claim 16 , comprising performing, via the controller, the programming process based on providing the data voltage to a capacitor of the pixel.

18. The method of claim 16 , comprising determining, via the controller, the data voltage based a threshold voltage of the pixel to compensate a change in the threshold voltage of the pixel.

19. The method of claim 16 , comprising performing, via the controller, the emission process based on a binary pulse width modulation operation.

20. The method of claim 16 comprising:
generating, via the controller, the image data, wherein the image data corresponds to a first bit-plane;
determining, via the controller, a second bit-plane different from the first bit-plane, wherein the one or more bits have a different binary order in the second bit-plane relative to the first bit-plane; and
generating, via the controller, one or more control signals to perform the emission process to implement the second bit-plane.

Assignees

• Apple Inc

Inventors

• Lin Yingkan
• Kuo Tien-Chien
• Wang Bilin
• Jeon Kanghoon
• Knez Ivan
• Huang Chun-Yao

Classifications

• G09G2310/0297

  Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns · CPC title

• G09G3/3266

  Details of drivers for scan electrodes · CPC title

• G09G2360/12

  Frame memory handling · CPC title

• G09G2370/00

  Aspects of data communication · CPC title

• G09G2300/0439

  Pixel structures · CPC title