Display device and method of manufacturing the same

US12225771B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12225771-B2
Application numberUS-202117318350-A
CountryUS
Kind codeB2
Filing dateMay 12, 2021
Priority dateSep 10, 2020
Publication dateFeb 11, 2025
Grant dateFeb 11, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device comprising: a first transistor comprising a light blocking pattern on a substrate, an active pattern comprising a drain region and a source region on the light blocking pattern, and a gate electrode on the active pattern; a second transistor for providing a data voltage to the first transistor in response to a gate signal; a first electrode on the gate electrode, directly electrically connected to the light blocking pattern, and directly electrically connected to the drain region or the source region; an emission layer on the first electrode; a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and comprising: a first conductive pattern in a same layer as the light blocking pattern; a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern; a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, at a different layer than the first conductive pattern, and electrically connected to the first conductive pattern; and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern; and a semiconductor pattern in a same layer as the active pattern, and contacting the second conductive pattern, wherein the semiconductor pattern is not doped, wherein the first electrode directly contacts the emission layer and the light blocking pattern, and directly contacts the drain region or the source region. 2. The display device of claim 1 , wherein the first conductive pattern and the second conductive pattern form a first capacitance. 3. The display device of claim 2 , wherein the second conductive pattern and the third conductive pattern form a second capacitance. 4. The display device of claim 3 , wherein the third conductive pattern and the fourth conductive pattern form a third capacitance. 5. The display device of claim 1 , wherein the first conductive pattern, the second conductive pattern, and the third conductive pattern overlap each other. 6. The display device of claim 1 , wherein the first conductive pattern, the second conductive pattern, and the fourth conductive pattern overlap each other. 7. The display device of claim 1 , wherein the first conductive pattern, the third conductive pattern, and the fourth conductive pattern overlap each other. 8. The display device of claim 1 , wherein the second conductive pattern, the third conductive pattern, and the fourth conductive pattern overlap each other. 9. The display device of claim 1 , further comprising a second electrode on the emission layer, wherein the fourth conductive pattern is in a same layer as the first electrode. 10. The display device of claim 1 , wherein the first conductive pattern, the third conductive pattern, and the gate electrode are for receiving a first signal, and wherein the second conductive pattern, the fourth conductive pattern, and the light blocking pattern are for receiving a second signal. 11. The display device of claim 1 , wherein the first conductive pattern and the third conductive pattern comprise a same material.

Assignees

Inventors

Classifications

  • H10K59/131Primary

    Interconnections, e.g. wiring lines or terminals · CPC title

  • the pixel elements being capacitors · CPC title

  • Interconnections, e.g. scanning lines · CPC title

  • using masks, e.g. half-tone masks · CPC title

  • comprising manufacture, treatment or patterning of TFT semiconductor bodies · CPC title

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Frequently asked questions

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What does patent US12225771B2 cover?
A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/131. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 11 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).