Transmission line capacitor and circuit board including the same embedded within

Patent metadata

Field	Value
Publication number	US-12213243-B2
Application number	US-202217718368-A
Country	US
Kind code	B2
Filing date	Apr 12, 2022
Priority date	Apr 27, 2021
Publication date	Jan 28, 2025
Grant date	Jan 28, 2025

Abstract

A surface mount transmission line capacitor can have excellent high frequency performance characteristics. The surface mount transmission line capacitor can include a monolithic substrate having a surface, a first electrode formed over the surface, a second electrode arranged over the first electrode, a dielectric layer arranged between the first electrode and second electrode, a first terminal layer exposed along the surface of the substrate and electrically connected with the first electrode, and a second terminal layer exposed along the surface of the substrate and electrically connected with the second electrode. The first terminal layer and the second terminal layer can be contained within a perimeter of the surface of the monolithic substrate.

First claim

What is claimed is:

1. A surface mount transmission line capacitor comprising:
a monolithic substrate having a surface;
a first thin-film electrode formed over the surface;
a second electrode arranged over the first electrode;
a dielectric layer arranged between the first electrode and second electrode;
a first terminal layer exposed along the surface of the substrate and electrically connected with the first electrode, the first terminal layer having a width in an X-direction and a length in a Y-direction to define a planar surface, the X-direction perpendicular to the Y-direction; and
a second terminal layer exposed along the surface of the substrate and electrically connected with the second electrode, the second terminal layer having a width in an X-direction and a length in a Y-direction to define a planar surface,
wherein the first terminal layer and the second terminal layer are contained within a perimeter of the surface of the monolithic substrate, and
wherein the planar surface of the first terminal layer and the planar surface of the second terminal layer are aligned in a Z-direction, the Z-direction perpendicular to each of the X-direction and the Y-direction.

2. The surface mount transmission line capacitor of claim 1 , wherein:
the substrate has a pair of end surfaces that are perpendicular to the surface of the monolithic substrate; and
the pair of end surfaces is free of terminations.

3. The surface mount transmission line capacitor of claim 1 , wherein the surface of the substrate has a pair of opposite end edges, and wherein each of the first terminal layer and the second terminal layer is spaced apart from the pair of opposite end edges of the surface of the monolithic substrate.

4. The surface mount transmission line capacitor of claim 3 , where the first terminal layer and second terminal layer are spaced apart from edges by respective distances that are 10 microns or greater.

5. The surface mount transmission line capacitor of claim 1 , wherein the surface mount transmission line capacitor exhibits an insertion loss that is greater than −1.0 dB for frequencies ranging from about 20 GHz to about 60 GHz.

6. The surface mount transmission line capacitor of claim 1 , wherein the surface mount transmission line capacitor exhibits an insertion loss that is greater than −0.25 dB for frequencies ranging from about 20 GHz to about 50 GHz.

7. The surface mount transmission line capacitor of claim 1 , wherein the substrate comprises at least one of quartz or alumina.

8. The surface mount transmission line capacitor of claim 1 , wherein the substrate comprises silicon.

9. The surface mount transmission line capacitor of claim 1 , wherein a thin-film resistive layer is arranged between the first electrode and the second electrode such that the thin-film resistive layer is connected in series with the capacitor.

10. The surface mount transmission line capacitor of claim 9 , wherein the thin-film resistive layer directly contacts at least one of the first electrode or the second electrode.

11. The surface mount transmission line capacitor of claim 10 , wherein the thin-film resistive layer comprises at least one of tantalum nitride (TaN), nickel-chromium alloys (NiCr), and ruthenium oxide (RuO2).

12. The surface mount transmission line capacitor of claim 1 , wherein the dielectric layer comprises at least one of silicon oxynitride (SiON) or barium titanate (BaTiO3).

13. A surface mount transmission line capacitor comprising:
a monolithic substrate having a surface;
a first electrode formed over the surface;
a second electrode arranged over the first electrode;
a dielectric layer arranged between the first electrode and second electrode;
a first terminal layer exposed along the surface of the substrate and electrically connected with the first electrode, the first terminal layer having a width in an X-direction and a length in a Y-direction to define a planar surface, the X-direction perpendicular to the Y-direction; and
a second terminal layer exposed along the surface of the substrate and electrically connected with the second electrode, the second terminal layer having a width in an X-direction and a length in a Y-direction to define a planar surface,
wherein the planar surface of the first terminal layer and the planar surface of the second terminal layer are aligned in a Z-direction that is perpendicular to each of the X-direction and the Y-direction such that the first terminal layer and second terminal layer are configured for connection with a mounting surface for surface mounting the surface mount transmission line capacitor on the mounting surface, and
wherein the surface mount transmission line capacitor exhibits an insertion loss that is greater than −1.0 dB for frequencies ranging from about 20 GHz to about 60 GHz.

14. The surface mount transmission line capacitor of claim 13 , wherein:
the substrate has a pair of end surfaces that are perpendicular to the surface of the monolithic substrate; and
the pair of end surfaces is free of terminations.

15. The surface mount transmission line capacitor of claim 13 , wherein the surface of the substrate has a pair of opposite end edges, and wherein each of the first terminal layer and the second terminal layer is spaced apart from the pair of opposite end edges of the surface of the monolithic substrate.

16. The surface mount transmission line capacitor of claim 15 , where the first terminal layer and second terminal layer are spaced apart from edges by respective distances that are 10 microns or greater.

17. The surface mount transmission line capacitor of claim 13 , wherein the surface mount transmission line capacitor exhibits an insertion loss that is greater than −1.0 dB for frequencies ranging from about 20 GHz to about 60 GHz.

18. The surface mount transmission line capacitor of claim 13 , wherein the surface mount transmission line capacitor exhibits an insertion loss that is greater than −0.25 dB for frequencies ranging from about 20 GHz to about 48 GHz.

19. The surface mount transmission line capacitor of claim 13 , wherein the substrate comprises at least one of quartz or alumina.

20. The surface mount transmission line capacitor of claim 13 , wherein the substrate comprises silicon.

21. The surface mount transmission line capacitor of claim 13 , wherein a thin-film resistive layer is arranged between the first electrode and the second electrode such that the thin-film resistive layer is connected in series with the capacitor.

22. The surface mount transmission line capacitor of claim 21 , wherein the thin-film resistive layer directly contacts at least one of the first electrode or the second electrode.

23. The surface mount transmission line capacitor of claim 22 , wherein the thin-film resistive layer comprises at least one of tantalum nitride (TaN), nickel-chromium alloys (NiCr), and ruthenium oxide (RuO2).

24. The surface mount transmission line capacitor of claim 13 , wherein the dielectric layer comprises at least one of silicon oxynitride (SiON) or barium titanate (BaTiO3).

25. A transmission line capacitor assembly comprising:
a mounting surface; and
a circuit component mounted to the mounting surface, the circuit component comprising:
a monolithic substrate having a surface;
a capacitor formed over the surface of the substrate, the capacitor comprising:
a first electrode, a second electrode, and a dielectric la

Assignees

• Kyocra Avx Components Corp
• Kyocera Avx Components Corp

Inventors

• Nelson Cory

Classifications

• H05K1/024

  Dielectric details, e.g. changing the dielectric material around a transmission line · CPC title

• H05K3/3405

  Edge mounted components, e.g. terminals · CPC title

• H01G4/236

  leading through the housing, i.e. lead-through · CPC title

• H01G4/012

  Form of non-self-supporting electrodes · CPC title

• H01G4/005

  Electrodes · CPC title