Input impedance boosting apparatus robust against parasitic components

Patent metadata

Field	Value
Publication number	US-12206435-B2
Application number	US-202318170228-A
Country	US
Kind code	B2
Filing date	Feb 16, 2023
Priority date	Feb 16, 2022
Publication date	Jan 21, 2025
Grant date	Jan 21, 2025

Abstract

Disclosed is an input impedance boosting apparatus. More particularly, an input impedance boosting apparatus including an analog-to-digital converter; an input capacitor connected to an input terminal of the analog-to-digital converter and a ground line and including a first shielding metal formed thereunder; a feedback capacitor connected onto a positive feedback loop of the analog-to-digital converter and including a second shielding metal formed thereunder; and an impedance booster connected to both ends of the feedback capacitor and configured to boost an input impedance based on a first parasitic component formed between the input capacitor and the first shielding metal and a second parasitic component formed between the feedback capacitor and the second shielding metal is provided.

First claim

What is claimed is:

1. An input impedance boosting apparatus, comprising:
an analog-to-digital converter;
an input capacitor connected to an input terminal of the analog-to-digital converter and a ground line and comprising a first shielding metal formed thereunder;
a feedback capacitor connected onto a positive feedback loop of the analog-to-digital converter and comprising a second shielding metal formed thereunder; and
an impedance booster connected to both ends of the feedback capacitor and configured to boost an input impedance based on a first parasitic component formed between the input capacitor and the first shielding metal and a second parasitic component formed between the feedback capacitor and the second shielding metal.

2. The input impedance boosting apparatus according to claim 1 , wherein the impedance booster boosts the input impedance in a manner of copying the first parasitic component and the second parasitic component and adding the copied first and second parasitic components to the positive feedback loop.

3. The input impedance boosting apparatus according to claim 1 , wherein the impedance booster comprises a first metal connected to a first terminal of the feedback capacitor; and a third shielding metal formed under the first metal and connected to a second terminal of the feedback capacitor.

4. The input impedance boosting apparatus according to claim 1 , wherein the first shielding metal and the second shielding metal are respectively connected to a ground line.

5. The input impedance boosting apparatus according to claim 1 , further comprising a chopper switch connected to an input terminal of the analog-to-digital converter.

6. The input impedance boosting apparatus according to claim 4 , wherein the impedance booster further comprises a dummy switch connected to both ends of the feedback capacitor.

7. The input impedance boosting apparatus according to claim 6 , wherein the impedance booster boosts the input impedance in a manner of copying a third parasitic component formed by the chopper switch through the dummy switch and of adding the copied third parasitic component to the positive feedback loop.

8. The input impedance boosting apparatus according to claim 6 , wherein the dummy switch is formed to have a size equal to the chopper switch.

9. The input impedance boosting apparatus according to claim 1 , wherein the feedback capacitor and the input capacitor are Metal-Oxide-Metal (MOM) capacitors.

10. The input impedance boosting apparatus according to claim 1 , wherein the analog-to-digital converter is a continuous-time delta-sigma analog-to-digital converter comprising a linear integrator provided with a linear Gm cell and a quantizer provided with a body-driven VCO and a Frequency to Digital Converter (FDC).

Assignees

• Daegu Gyeongbuk Inst Science & Tech

Inventors

• Lee Jung Hyup
• Lee Se Hwan

Classifications

• H03M1/12

  Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

• H03M1/068 Primary

  the original and additional components or elements being complementary to each other, e.g. CMOS · CPC title

• H03M3/356

  Offset or drift compensation (removal of offset already present on the analogue input signal H03M3/494) · CPC title

• H03M3/35

  using redundancy · CPC title

• H03M1/0607

  Offset or drift compensation (removal of offset already present on the analogue input signal H03M1/1295) · CPC title