Pin diode detector, method of making the same, and system including the same

US12206038B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12206038-B2
Application numberUS-202217827571-A
CountryUS
Kind codeB2
Filing dateMay 27, 2022
Priority dateMay 20, 2022
Publication dateJan 21, 2025
Grant dateJan 21, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A PIN diode detector includes a substrate. The PIN diode detector further includes a plurality of PIN diode wells in a pixel region, wherein each of the plurality of PIN diode wells has a first dopant type. The PIN diode detector further includes a connecting ring well and a plurality of floating ring wells in a peripheral region, wherein the connecting ring well and plurality of floating ring wells have the first dopant type. The PIN diode detector further includes a field stop ring well surrounding the plurality of floating ring wells, wherein the field stop ring well has a second dopant type opposite the first dopant type. The PIN diode detector further includes a blanket doped region. The blanket doped region extends continuously through an entirety of the pixel region and an entirety of the peripheral region, and the blanket doped region has the second dopant type.

First claim

Opening claim text (preview).

What is claimed is: 1. A PIN diode detector comprising: a substrate, wherein the substrate includes a pixel region and a peripheral region, and the peripheral region surrounds the pixel region; a plurality of PIN diode wells in the pixel region, wherein each of the plurality of PIN diode wells has a first dopant type; a connecting ring well in the peripheral region, wherein the connecting ring well has the first dopant type; a plurality of floating ring wells surrounding the connecting ring well, wherein each of the plurality of floating ring wells has the first dopant type; a field stop ring well surrounding the plurality of floating ring wells, wherein the field stop ring well has a second dopant type opposite the first dopant type; and a blanket doped region, wherein the blanket doped region extends continuously through an entirety of the pixel region and an entirety of the peripheral region, and the blanket doped region has the second dopant type. 2. The PIN diode detector of claim 1 , wherein a depth of the blanket doped region ranges from about 0.5 microns (μm) to about 1.5 μm. 3. The PIN diode detector of claim 1 , wherein a dopant concentration in the blanket doped region ranges from about 1×10 14 dopants/cm 3 to about 1×10 15 dopants/cm 3 . 4. The PIN diode detector of claim 1 , wherein the substrate comprises a diced edge, and the substrate comprises a damaged region where a crystal structure of the substrate adjacent to the diced edge is damaged in comparison with a crystal structure of a pixel region of the substrate. 5. The PIN diode detector of claim 4 , further comprising a depletion region in the substrate in the pixel region, wherein the depletion region extends into the peripheral region, and an entirety of the depletion region is spaced from the damaged region. 6. The PIN diode detector of claim 4 , wherein a bottom surface of the depletion region in a central area of the pixel region is substantially planar. 7. The PIN diode detector of claim 1 , wherein a number of the plurality of floating ring wells ranges from 2 to 10. 8. The PIN diode detector of claim 1 , wherein the plurality of PIN diode wells is in a two-dimensional array in the pixel region. 9. The PIN diode detector of claim 1 , wherein each of the plurality of PIN diode wells are configured to detect x-ray radiation. 10. A method of making a PIN diode detector, the method comprising: implanting a plurality of PIN diode wells into a pixel region of a substrate, wherein each of the plurality of PIN diode wells has a first dopant type; implanting a connecting ring well into a peripheral region of the substrate, wherein the peripheral region surrounds the pixel region, and the connecting ring well has the first dopant type; implanting a plurality of floating ring well into the peripheral region of the substrate, wherein each of the plurality of floating ring wells has the first dopant type; implanting a field stop ring well surrounding the plurality of floating ring wells, wherein the field stop ring well has a second dopant type opposite the first dopant type; and blanket doping the pixel region and the peripheral region of the substrate to define a blanket doped region continuous across the pixel region and the peripheral region, wherein the blanket doped region has the second dopant type. 11. The method of claim 10 , wherein the blanket doping comprises performing ion implantation at a dosage ranging from about 1×10 11 dopants/cm 2 to about 5×10 11 dopants/cm 2 . 12. The method of claim 10 , wherein the blanket doping comprises performing ion implantation at an energy ranging from about 20 kiloelectronvolts (keV) to about 50 keV. 13. The method of claim 10 , wherein the blanket doping is performed prior to the implanting of the plurality of PIN diode wells. 14. The method of claim 10 , wherein implanting the field stop ring well comprises implanting the field stop ring well prior to implanting the plurality of floating ring wells. 15. The method of claim 10 , wherein the blanket doping is performed prior to the implanting of the field stop ring well. 16. The method of claim 10 , wherein the implanting of the PIN diode wells, the implanting of the connecting ring well, and the implanting of the plurality of floating ring wells is performed simultaneously. 17. The method of claim 10 , wherein the implanting of the plurality of floating ring wells comprises implanting the plurality of floating ring wells surrounding the connecting ring well. 18. The method of claim 10 , wherein the blanket doping comprises forming the blanket doped region having a depth ranging from about 0.5 microns (μm) to about 1.5 μm. 19. A PIN diode detector system, the system comprising: a source configured to emit electromagnetic radiation; a PIN diode detector configured to detect the electromagnetic radiation, wherein the PIN diode detector comprises: a substrate, wherein the substrate includes a pixel region and a peripheral region, and the peripheral region surrounds the pixel region; a plurality of PIN diode wells in the pixel region, wherein each of the plurality of PIN diode wells has a first dopant type; a connecting ring well in the peripheral region, wherein the connecting ring well has the first dopant type; a plurality of floating ring wells surrounding the connecting ring well, wherein each of the plurality of floating ring wells has the first dopant type; a field stop ring well surrounding the plurality of floating ring wells, wherein the field stop ring well has a second dopant type opposite the first dopant type; and a blanket doped region, wherein the blanket doped region extends continuously through an entirety of the pixel region and an entirety of the peripheral region, and the blanket doped region has the second dopant type; and a display configured to display an image corresponding to the detected electromagnetic radiation. 20. The system of claim 19 , wherein the source is configured to emit x-ray radiation.

Assignees

Inventors

Classifications

  • comprising only Group III-V materials, e.g. GaAs · CPC title

  • Electronic components shared by multiple pixels, e.g. one amplifier shared by two pixels · CPC title

  • H10F39/189Primary

    X-ray, gamma-ray or corpuscular radiation imagers · CPC title

  • with semiconductor detectors · CPC title

  • H10F30/223Primary

    the potential barrier being a PIN barrier · CPC title

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What does patent US12206038B2 cover?
A PIN diode detector includes a substrate. The PIN diode detector further includes a plurality of PIN diode wells in a pixel region, wherein each of the plurality of PIN diode wells has a first dopant type. The PIN diode detector further includes a connecting ring well and a plurality of floating ring wells in a peripheral region, wherein the connecting ring well and plurality of floating ring …
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd, Tsmc China Company Ltd
What technology area does this patent fall under?
Primary CPC classification H10F39/189. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 21 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).