Peer-to-peer communications initiated among communication fabric coupled endpoint devices

Patent metadata

Field	Value
Publication number	US-12204476-B2
Application number	US-202318151797-A
Country	US
Kind code	B2
Filing date	Jan 9, 2023
Priority date	Feb 5, 2019
Publication date	Jan 21, 2025
Grant date	Jan 21, 2025

Abstract

Computing architectures, platforms, and systems are provided herein. In one example, system is provided. The system includes a management processor configured to initiate a communication arrangement between a first endpoint device coupled to a communication fabric and a second endpoint device coupled to the communication fabric. The communication arrangement is configured to redirect a transfer from the first endpoint device based on an address corresponding to an address range of the second endpoint device without passing the transfer through a host processor coupled to the communication fabric that executes an application initiating the transfer.

First claim

What is claimed is:

1. A system comprising:
a management driver executed by a host processor configured to initiate a communication arrangement between a first endpoint device coupled to a communication fabric and a second endpoint device coupled to the communication fabric;
wherein the communication arrangement is configured to redirect a transfer from the first endpoint device based on an address corresponding to an address range of the second endpoint device without passing the transfer through a host processor coupled to the communication fabric that executes an application initiating the transfer; and
wherein the management driver is configured to interface with a first device driver associated with the first endpoint device at least to initiate a direct memory access (DMA) transfer via the first device driver with a destination address corresponding to the address range for the second endpoint device.

2. The system of claim 1 , wherein the communication fabric comprises types selected from at least one among a Peripheral Component Interconnect Express (PCIe), NVMe, FibreChannel, NVLink, Gen-Z, Cache Coherent Interconnect for Accelerators (CCIX), Compute Express Link (CXL), and Open Coherent Accelerator Processor Interface (OpenCAPI).

3. The system of claim 1 , wherein the first endpoint device comprises a Graphics Processing Unit (GPU) and the second endpoint device comprises a storage device.

4. The system of claim 1 , wherein the communication arrangement is further established to detect an additional transfer from the second endpoint device to one or more addresses corresponding to an address range for the first endpoint device, and redirect the additional transfer to the first endpoint device without passing the additional transfer through the host processor that initiates the additional transfer.

5. The system of claim 1 , wherein the address range of the second endpoint device is in addition to a memory mapped address range assigned to the second endpoint device within a memory space of the host processor during enumeration of the second endpoint device by the host processor.

6. The system of claim 1 , wherein the transfer is initiated by a request originated by the application executed by the host processor to transfer data from the first endpoint device to the second endpoint device via a command that employs the communication arrangement.

7. The system of claim 1 , wherein the communication arrangement establishes a virtual address range for at least the second endpoint device and populates an address trap in the communication fabric with a translation among the virtual address range and a physical address range associated with the second endpoint device; and
wherein the address trap redirects the transfer from the first endpoint device indicating the virtual address range to a physical address range of the second endpoint device without passing the transfer through the host processor.

8. The system of claim 1 , wherein the communication arrangement redirects the transfer from the first endpoint device directed to the one or more addresses corresponding to the address range for the second endpoint device at least in part by translating the one or more addresses into physical addresses of the second endpoint device.

9. A method comprising:
initiating a communication arrangement between a first endpoint device coupled to a communication fabric and a second endpoint device coupled to the communication fabric;
wherein the communication arrangement is configured to redirect a transfer from the first endpoint device based on an address corresponding to an address range of the second endpoint device without passing the transfer through a host processor coupled to the communication fabric that executes an application initiating the transfer; and
wherein a management driver of the host processor interfaces with a first device driver associated with the first endpoint device at least to initiate a direct memory access (DMA) transfer via the first device driver with a destination address corresponding to the address range for the second endpoint device.

10. The method of claim 9 , wherein the communication fabric comprises types selected from at least one among a Peripheral Component Interconnect Express (PCIe), NVMe, FibreChannel, NVLink, Gen-Z, Cache Coherent Interconnect for Accelerators (CCIX), Compute Express Link (CXL), and Open Coherent Accelerator Processor Interface (OpenCAPI).

11. The method of claim 9 , wherein the first endpoint device comprises a Graphics Processing Unit (GPU) and the second endpoint device comprises a storage device.

12. The method of claim 9 , wherein at least one transfer is initiated by a request originated by the application executed by the host processor to transfer data from the first endpoint device to the second endpoint device via a command that employs the communication arrangement.

13. The method of claim 9 ,
further comprising:
establishing a virtual address range for at least the second endpoint device and populating an address trap in the communication fabric with a translation among the virtual address range and a physical address range associated with the second endpoint device; and
wherein the address trap redirects the transfer from the first endpoint device indicating the virtual address range to a physical address range of the second endpoint device without passing the transfer through the host processor.

14. The method of claim 9 , wherein the communication arrangement redirects the transfer from the first endpoint device directed to the one or more addresses corresponding to the address range for the second endpoint device at least in part by translating the one or more addresses into physical addresses of the second endpoint device.

15. An apparatus comprising:
one or more computer readable storage media;
program instructions stored on the one or more computer readable storage media, that when executed by a processor, direct the processor to at least:
receive, via a user interface, instructions to initiate a communication arrangement between a first endpoint device coupled to a communication fabric and a second endpoint device coupled to the communication fabric;
wherein the communication arrangement is configured to redirect a transfer from the first endpoint device based on an address corresponding to an address range of the second endpoint device without passing the transfer through a host processor coupled to the communication fabric that executes an application initiating the transfer; and
wherein a management driver executed by the host processor interfaces with a first device driver associated with the first endpoint device at least to initiate a direct memory access (DMA) transfer via the first device driver with a destination address corresponding to the address range for the second endpoint device.

16. The apparatus of claim 15 , wherein the communication fabric comprises types selected from at least one among a Peripheral Component Interconnect Express (PCIe), NVMe, FibreChannel, NVLink, Gen-Z, Cache Coherent Interconnect for Accelerators (CCIX), Compute Express Link (CXL), and Open Coherent Accelerator Processor Interface (OpenCAPI).

17. The apparatus of claim 15 , wherein the address range of the second endpoint device is in addition to a memory mapped address range assigned to the second endpoint device within a memory space of the host processor during enumeration of the second endpoint device by the host processor.

18. The apparatus of claim 15 , wherein the transfer is initiated

Assignees

• Liqid Inc

Inventors

• Cannata James Scott
• Long Christopher R
• Puri Sumit
• Schramm Bryan

Classifications

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/4221

  being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus · CPC title

• G06F13/4234 Primary

  being a memory bus · CPC title

• G06F2213/0026

  PCI express · CPC title

• G06F13/404

  with address mapping · CPC title