Interface bus combining
US-11886228-B2 · Jan 30, 2024 · US
with address mapping
with address mapping · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06F13/404 |
| Official title | {with address mapping} |
| Display label | with address mapping |
| Total patents | 861 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2015 | 48 |
| 2016 | 89 |
| 2017 | 116 |
| 2018 | 113 |
| 2019 | 110 |
| 2020 | 89 |
| 2021 | 61 |
| 2022 | 66 |
| 2023 | 56 |
| 2024 | 54 |
| 2025 | 50 |
| 2026 | 9 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Sensor systems and methods utilizing adaptively selected carrier frequencies
US-9529763-B2 · Dec 27, 2016 · US
Bridge circuitry for communications with dynamically reconfigurable circuits
US-9465763-B2 · Oct 11, 2016 · US
Peripheral communication
US-2016267038-A1 · Sep 15, 2016 · US
Interface circuit for high speed communication, and semiconductor apparatus and system including the same
US-2016224506-A1 · Aug 4, 2016 · US
Command queue for communication bus
US-2016224490-A1 · Aug 4, 2016 · US
Interconnect and method of operation of an interconnect
US-2016203093-A1 · Jul 14, 2016 · US
Bus serialization for devices without multi-device support
US-2016147707-A1 · May 26, 2016 · US
Bus master, bus system, and bus control method
US-2016062930-A1 · Mar 3, 2016 · US
Implementing security functions using ROM
US-9275196-B2 · Mar 1, 2016 · US
Translating between memory transactions of first type and memory transactions of a second type
US-2016011985-A1 · Jan 14, 2016 · US
Bridging inter-bus communications
US-2016004656-A1 · Jan 7, 2016 · US
Employing multiple i2c devices behind a microcontroller in a detachable platform
US-2015378957-A1 · Dec 31, 2015 · US
Computer interconnect isolation
US-9223737-B1 · Dec 29, 2015 · US
Memory switching protocol when switching optically-connected memory
US-2015370697-A1 · Dec 24, 2015 · US
Address range transfer from first node to second node
US-2015370702-A1 · Dec 24, 2015 · US
Sata initiator addressing and storage device slicing
US-2015363346-A1 · Dec 17, 2015 · US
I/O bus system
US-9213662-B2 · Dec 15, 2015 · US
Seamless addition of high bandwidth lanes
US-2015356052-A1 · Dec 10, 2015 · US
Efficient error handling mechanisms in data storage systems
US-9208020-B2 · Dec 8, 2015 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G06F13/404?
- CPC G06F13/404 is the Cooperative Patent Classification code for “with address mapping.”
- How many patents are filed under CPC G06F13/404 (with address mapping)?
- Our database includes 861 publications tagged with this CPC code.
- Is patent activity under CPC G06F13/404 growing?
- Publication counts under this code: 54 in 2024 vs 50 in 2025 (latest complete years).