Display controller, display device, display system, and control method

Patent metadata

Field	Value
Publication number	US-12190800-B2
Application number	US-202218246047-A
Country	US
Kind code	B2
Filing date	May 31, 2022
Priority date	May 31, 2022
Publication date	Jan 7, 2025
Grant date	Jan 7, 2025

Abstract

A display controller, a display device, a display system, and a control method are provided. The display controller includes: a flag-signal circuit configured to send a flag-signal to an application processor; an image processing circuit configured to obtain second current image data in response to receiving first current image data from the application processor, wherein the first current image data is sent by the application processor in response to receiving the flag-signal sent from the flag-signal circuit; and a drive circuit configured to generate a first drive control signal in response to receiving the second current image data from the image processing circuit.

First claim

What is claimed is:

1. A display controller, comprising:
a flag-signal circuit configured to send a flag-signal to an application processor;
an image processing circuit configured to obtain second current image data in response to receiving first current image data from the application processor, wherein the first current image data is sent by the application processor in response to receiving the flag-signal sent from the flag-signal circuit; and
a drive circuit configured to generate a first drive control signal in response to receiving the second current image data from the image processing circuit,
wherein the flag-signal circuit is further configured to send the flag-signal loaded with a first pulse signal to the application processor, and the flag-signal loaded with the first pulse signal is configured to indicate that the application processor is allowed to send the first current image data to the image processing circuit,
wherein the image processing circuit is further configured to obtain, according to the first current image data, the second current image data in response to receiving the first current image data from the application processor, and the first current image data is sent by the application processor in response to receiving the flag-signal loaded with the first pulse signal, which is sent from the flag-signal circuit,
wherein the first drive control signal comprises a scan start signal loaded with a second pulse signal,
wherein the drive circuit is further configured to generate the scan start signal loaded with the second pulse signal in response to detecting that previous image data from the application processor is processed, and
wherein the flag-signal circuit is further configured to generate the flag-signal loaded with the first pulse signal in response to receiving the scan start signal loaded with the second pulse signal from the drive circuit.

2. The display controller according to claim 1 , wherein a change frequency of the flag-signal loaded with the first pulse signal is consistent with a change frequency of the scan start signal; and
a current response speed of a display module is consistent with the change frequency of the scan start signal.

3. The display controller according to claim 1 , wherein
the drive circuit is configured to adjust a change frequency of the first drive control signal according to an image data transmission frequency of the application processor, so as to obtain a second drive control signal, wherein the second drive control signal is configured to drive a sub-pixel circuit comprised in a display module to display display data, and a change frequency of the second drive control signal is matched with the image data transmission frequency.

4. The display controller according to claim 3 , wherein
the drive circuit is configured to adjust, in response to determining that a current display frequency is not matched with the image data transmission frequency, the change frequency of the first drive control signal according to the image data transmission frequency, so as to obtain the second drive control signal.

5. The display controller according to claim 4 , wherein
the drive circuit is configured to increase, in response to determining that the current display frequency is less than the image data transmission frequency, the change frequency of the first drive control signal according to the image data transmission frequency, so as to obtain the second drive control signal.

6. The display controller according to claim 4 , wherein
the drive circuit is configured to reduce, in response to determining that the current display frequency is greater than the image data transmission frequency, the change frequency of the first drive control signal according to the image data transmission frequency, so as to obtain the second drive control signal.

7. The display controller according to claim 1 , wherein
the drive circuit is configured to determine display frequency adjustment information in response to receiving a first display frequency adjustment request from the application processor, and adjust a change frequency of the first drive control signal according to the display frequency adjustment information to obtain a third drive control signal, wherein the third drive control signal is configured to drive a sub-pixel circuit comprised in a display module to display display data.

8. The display controller according to claim 7 , wherein the display frequency adjustment information comprises a first display frequency range corresponding to a current application, and the first display frequency range is determined by the application processor according to attribute information of the current application.

9. The display controller according to claim 7 , wherein the display frequency adjustment information comprises a preset second display frequency range.

10. The display controller according to claim 1 , wherein the first drive control signal is configured to drive a sub-pixel circuit comprised in a display module to display display data, wherein the display data is determined according to the second current image data, and a current response speed of the display module is N times of a current display frequency of the display module, wherein Nis an integer greater than or equal to 1.

11. A display device, comprising:
the display controller according to claim 1 ; and
a display module connected to the display controller, wherein the display module is configured to display display data according to a drive control signal provided by the display controller, wherein the display data is determined according to the second current image data.

12. The display device according to claim 11 , wherein the display module comprises:
a sub-pixel circuit;
a gate drive circuit connected to the display controller and the sub-pixel circuit, wherein the gate drive circuit is configured to provide a scan start signal, a gate drive signal, and a reset signal to the sub-pixel circuit according to the first drive control signal sent by the display controller; and
a source drive circuit connected to the display controller and the sub-pixel circuit, wherein the source drive circuit is configured to provide a data signal to the sub-pixel circuit according to the first drive control signal sent by the display controller, wherein the gate drive signal, the reset signal, and the data signal are configured to drive the sub-pixel circuit to display the display data.

13. The display device according to claim 12 , wherein a change frequency of the scan start signal is configured as an anode reset frequency of the sub-pixel circuit.

14. A display system, comprising:
the display device according to claim 11 ; and
an application processor configured to send the first current image data to the image processing circuit in response to receiving the flag-signal from the flag-signal circuit.

15. The display system according to claim 14 , wherein
the application processor is configured to send a display frequency adjustment request to the drive circuit, so that the drive circuit determines display frequency adjustment information in response to receiving the display frequency adjustment request from the application processor, and adjusts a change frequency of the first drive control signal according to the display frequency adjustment information to obtain a third drive control signal, wherein the third drive control signal is configured to drive a sub-pixel circuit to display the display data.

16. The display system according to claim 15 , wherein the display frequenc

Assignees

• Boe Technology Group Co Ltd

Inventors

• Wu Baoyun
• Yu Yang
• Zhu Yuanzhang
• Tian Xuesong
• Han Xinbin
• Shi Shiming
• Zhao Hui
• Yang Hualing

Classifications

• G09G3/3266

  Details of drivers for scan electrodes · CPC title

• G09G3/2092

  Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165) · CPC title

• G09G2370/00

  Aspects of data communication · CPC title

• G09G2340/0435

  Change or adaptation of the frame rate of the video stream · CPC title

• G09G2320/0252

  Improving the response speed · CPC title