Adaptive multipath fabric for balanced performance and high availability

US12181984B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12181984-B2
Application numberUS-202318332242-A
CountryUS
Kind codeB2
Filing dateJun 9, 2023
Priority dateAug 19, 2016
Publication dateDec 31, 2024
Grant dateDec 31, 2024

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A computing system providing high-availability access to computing resources includes: a plurality of interfaces; a plurality of sets of computing resources, each of the sets of computing resources including a plurality of computing resources; and at least three switches, each of the switches being connected to a corresponding one of the interfaces via a host link and being connected to a corresponding one of the sets of computing resources via a plurality of resource connections, each of the switches being configured such that data traffic is distributed to remaining ones of the switches through a plurality of cross-connections between the switches if one of the switches fails.

First claim

Opening claim text (preview).

What is claimed is: 1. A computing system comprising: a first interface and a second interface; a first switch: connected to the first interface via a first host link; and connected to at least one switch of a third switch or a fourth switch via a first inter-switch connection; a second switch: connected to the second interface via a second host link; and connected to at least one of the third switch or the fourth switch via a second inter-switch connection; a first set of computing resources connected to the first switch and the second switch; and a second set of computing resources connected to the first switch and the second switch, wherein the first host link supports a bandwidth greater than or equal to a first bandwidth of the first set of computing resources. 2. The computing system of claim 1 , wherein the first inter-switch connection supports at least a bandwidth based on the first bandwidth, the first interface, and the second interface. 3. The computing system of claim 1 , wherein: the second host link supports a bandwidth greater than or equal to a second bandwidth of the second set of computing resources; and the second inter-switch connection supports at least a bandwidth based on the second bandwidth, the first interface, and the second interface. 4. The computing system of claim 1 , wherein: the first switch is connected to the third switch and the fourth switch of the computing system via the first inter-switch connection and a third-inter-switch connection; and the second switch is connected to the third switch and the fourth switch of the computing system via the second inter-switch connection and a fourth inter-switch connection. 5. The computing system of claim 1 , wherein the first switch is connected to a fifth switch via a fifth inter-switch connection. 6. The computing system of claim 1 , further comprising: a first server node comprising the first interface; and a second server node comprising the second interface. 7. The computing system of claim 1 , further comprising a third server node comprising a third interface, the third interface being connected to the third switch via a third host link. 8. The computing system of claim 1 , wherein the fourth switch is connected to the first switch via a third inter-switch connection and connected to the second switch via a fourth inter-switch connection. 9. The computing system of claim 1 , wherein at least one switch among the first switch, the second switch, the third switch, or the fourth switch is configured to: detect a failure of another switch; and provide access to the first set of computing resources and the second set of computing resources via at least one of the first host link or the second host link and at least one of the first inter-switch connection or the second inter-switch connection. 10. A device comprising: a first switch; a second switch; a third switch connected to the first switch via a first inter-switch connection and connected to the second switch via a second inter-switch connection; a first computing unit connected to: the first switch via a first resource connection; and the second switch via a second resource connection; a second computing unit connected to: the first switch via a third resource connection; and the second switch via a fourth resource connection; and a first interface connected to the first computing unit via a host link and the first switch, wherein the host link supports a total bandwidth greater than or equal to a first bandwidth of a first set of computing resources comprising the first computing unit. 11. The device of claim 10 , further comprising a fourth switch, wherein the first switch is connected to the third switch and the fourth switch and the second switch is connected to the third switch and the fourth switch via corresponding inter-switch connections. 12. The device of claim 10 , further comprising: a fourth switch; a third inter-switch connection connecting the first switch to the fourth switch; a fourth inter-switch connection connecting the second switch to the fourth switch; and a fifth inter-switch connection connecting the third switch to the fourth switch. 13. A method of accessing data from a computing system, the method comprising: detecting, by a second switch, a failure of a first switch associated with a first interface and a first set of computing resources, the first set of computing resources having a first bandwidth; receiving a communication associated with accessing the first set of computing resources via the first switch; and providing, based on the communication, access to the first set of computing resources via a second host link connecting a second interface to the second switch, the second host link supporting a bandwidth greater than or equal to the first bandwidth. 14. The method of claim 13 wherein the computing system comprises: the first interface and the second interface; the first switch: connected to the first interface via a first host link; and connected to at least one switch of a third switch or a fourth switch via a first inter-switch connection; the second switch: connected to the second interface via the second host link; and connected to at least one of the third switch or the fourth switch via a second inter-switch connection; the first set of computing resources connected to the first switch and the second switch; and a second set of computing resources connected to the first switch and the second switch, wherein the first host link supports a bandwidth greater than or equal to the first bandwidth. 15. The method of claim 14 , wherein: the computing system further comprises a fifth switch and a sixth switch; the first switch is connected to at least one of the fifth switch or the sixth switch; the second switch is connected to at least one of the fifth switch or the sixth switch; the third switch is connected to at least one of the fifth switch or the sixth switch; and the fourth switch is connected to at least one of the fifth switch or the sixth switch. 16. The method of claim 15 , wherein: the first switch is connected to the fifth switch and the sixth switch; the second switch is connected to the fifth switch and the sixth switch; the third switch is connected to the fifth switch and the sixth switch; and the fourth switch is connected to the fifth switch and the sixth switch. 17. The method of claim 14 , wherein the computing system further comprises: a first secondary switch connected to a first server node comprising the first interface; a second secondary switch connected to a second server node comprising the second interface; a third secondary switch connected to a third server node comprising a third interface; a first secondary inter-switch connection connecting the first secondary switch to the second secondary switch; a second secondary inter-switch connection connecting the first secondary switch to the third secondary switch; and a third secondary inter-switch connection connecting the second secondary switch to the third secondary switch. 18. The method of claim 14 , wherein the computing system further comprises: the first set of computing resources comprises a first computing unit and a first set of data storage devices, the first set of data storage devices comprising: a first data storage device having a first port connected to the first switch via a first resource connection and a second port connected to the second switch via a second resource conne

Assignees

Inventors

Classifications

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

  • Techniques of failing over between control units · CPC title

  • switching over of hardware resources · CPC title

  • G06F11/201Primary

    between storage system components · CPC title

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Frequently asked questions

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What does patent US12181984B2 cover?
A computing system providing high-availability access to computing resources includes: a plurality of interfaces; a plurality of sets of computing resources, each of the sets of computing resources including a plurality of computing resources; and at least three switches, each of the switches being connected to a corresponding one of the interfaces via a host link and being connected to a corre…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F11/201. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 31 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).