Multilayer electronic component

Patent metadata

Field	Value
Publication number	US-12176149-B2
Application number	US-202217953923-A
Country	US
Kind code	B2
Filing date	Sep 27, 2022
Priority date	Dec 31, 2021
Publication date	Dec 24, 2024
Grant date	Dec 24, 2024

Abstract

A multilayer electronic component includes a body including first and second surfaces opposing each other in a first direction, and third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction; a first external electrode including a first connection portion disposed on the third surface, and a third band portion extending from the first connection portion to a portion of the second surface; a second external electrode including a second connection portion disposed on the fourth surface, and a fourth band portion extending from the second connection portion to a portion of the second surface; an insulating layer disposed on the first and second connection portions and covering the second surface and the third and fourth band portions; the insulating layer includes an oxide including zirconium (Zr).

First claim

What is claimed is:

1. A multilayer electronic component, comprising:
a body including a dielectric layer and first and second internal electrodes alternately disposed while having the dielectric layer interposed therebetween, and including first and second surfaces opposing each other in a first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction;
a first external electrode including a first connection portion disposed on the third surface and a first band portion extended from the first connection portion onto a portion of the first surface;
a second external electrode including a second connection portion disposed on the fourth surface and a second band portion extended from the second connection portion onto a portion of the first surface;
a first insulating layer disposed on the first connection portion;
a second insulating layer disposed on the second connection portion;
a first plating layer disposed on the first band portion; and
a second plating layer disposed on the second band portion,
wherein the first and second insulating layers include an oxide including zirconium (Zr), and
wherein the first and second insulating layers further include one or more of Mg, Ca, or oxides thereof.

2. The multilayer electronic component of claim 1 , wherein an average thickness of the insulating layer is greater than 20 nm and equal to or less than 1000 nm.

3. The multilayer electronic component of claim 1 , wherein an average thickness of the insulating layer is 50 nm or more and 1000 nm or less.

4. The multilayer electronic component of claim 1 , wherein an average thickness of the insulating layer is greater than 400 nm and equal to or less than 1000 nm.

5. The multilayer electronic component of claim 1 , wherein the first oxide including zirconium (Zr) is ZrO 2 .

6. The multilayer electronic component of claim 1 , wherein the dielectric layer is substantially free of yttrium (Y).

7. The multilayer electronic component of claim 1 , wherein the first and second insulating layers are substantially free of yttrium (Y).

8. The multilayer electronic component of claim 1 , wherein, among elements present in the first and second insulating layers, a number of moles of zirconium (Zr) element based on a total number of moles of elements other than oxygen is 0.95 or more.

9. The multilayer electronic component of claim 1 , wherein H 1 >H 2 in which H 1 indicates an average size of a region in the first direction, measured from the first surface to an internal electrode disposed closest to the first surface among the first and second internal electrodes, and H 2 indicates an average size of the first or second plating layer in the first direction, measured from an extension line of the first surface to an end of the first or second plating layer disposed on the first or second connection portion.

10. The multilayer electronic component of claim 1 , wherein H 1 <H 2 in which H 1 indicates an average size of a region in the first direction, measured from the first surface to an internal electrode disposed closest to the first surface among the first and second internal electrodes, and H 2 indicates an average size of the first or second plating layer in the first direction, measured from an extension line of the first surface to an end of the first or second plating layer disposed on the first or second connection portion.

11. The multilayer electronic component of claim 10 , wherein H 2 <T/2 in which T indicates an average size of the body in the first direction.

12. The multilayer electronic component of claim 1 , wherein the first and second plating layers are disposed below an extension line of the first surface.

13. The multilayer electronic component of claim 1 , wherein, an average size of the body in the second direction is defined as L, an average distance in the second direction from an extension line of the third surface to an end of the first band portion is defined as B 1 , an average distance in the second direction from an extension line of the fourth surface to an end of the second band portion is defined as B 2 , and 0.2≤B 1 /L≤0.4 and 0.2≤B 2 /L≤0.4 are satisfied.

14. The multilayer electronic component of claim 1 , further comprising:
an additional insulating layer disposed on the first surface and disposed between the first band portion and the second band portion.

15. The multilayer electronic component of claim 1 , wherein an average thickness of the dielectric layer is 0.35 m or less.

16. The multilayer electronic component of claim 1 , wherein an average thickness of the first and second internal electrodes is 0.35 m or less.

17. The multilayer electronic component of claim 1 , further comprising:
a capacitance formation portion including the first and second internal electrodes alternately disposed with the dielectric layer interposed therebetween and a cover portion disposed on both end surfaces of the capacitance formation portion in the first direction,
wherein an average size of the cover portion in the first direction is 15 m or less.

18. The multilayer electronic component of claim 1 , wherein an average thickness of the first and second plating layers is less than an average thickness of the first and second insulating layers.

19. The multilayer electronic component of claim 1 , wherein the first plating layer is disposed to cover one end close to the first surface of the first insulating layer, and the second plating layer is disposed to cover another end close to the first surface of the second insulating layer.

20. The multilayer electronic component of claim 1 , wherein the first insulating layer is disposed to cover an end disposed on said first external electrode of the first plating layer, and the second insulating layer is disposed to cover another end disposed on the second outer electrode of the second plating layer.

21. The multilayer electronic component of claim 1 , wherein the first external electrode further includes a first side band portion extending from the first connection portion to portions of the fifth and sixth surfaces and the second external electrode further includes a second side band portion extending from the second connection portion to portions of the fifth and sixth surfaces, and
wherein the sizes of the first and second side band portions in the second direction may gradually increase toward the first surface.

22. The multilayer electronic component of claim 1 , wherein the first and second external electrodes are spaced apart from the fifth and sixth surfaces.

23. The multilayer electronic component of claim 1 , wherein the first and second external electrodes are spaced apart from the second surfaces.

24. The multilayer electronic component of claim 1 , wherein the first and second insulating layers are disposed to extend from the first and second connection portions onto the second surface.

25. The multilayer electronic component of claim 1 , wherein the first and second insulating layers are disposed to extend from the first and second connection portions onto the fifth and sixth surface.

26. The multilayer electronic component of claim 1 , wherein the first and second insulating layer are not disposed on the second, fifth and sixth surfaces.

Assignees

• Samsung Electro Mech

Inventors

• Na Jae Young
• Lim Jin Hyung
• Kim Sung Soo
• Han Seung Hun
• Jo Ji Hong

Classifications

• H01G4/1209

  characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence) · CPC title

• H01G4/224

  Housing; Encapsulation · CPC title

• H01G4/2325 Primary

  characterised by the material of the terminals · CPC title

• H01G4/30 Primary

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/248

  the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence) · CPC title