Display panel and display device

Patent metadata

Field	Value
Publication number	US-12174497-B2
Application number	US-202217637086-A
Country	US
Kind code	B2
Filing date	Jan 25, 2022
Priority date	Jan 17, 2022
Publication date	Dec 24, 2024
Grant date	Dec 24, 2024

Abstract

A display panel and a display device are provided. The display panel has a first area, a second area, and a third area arranged in sequence. The display panel includes a substrate, a plurality of first wirings, and a plurality of second wirings. The first wirings extend from the first area to the second area. The second wirings extend from the second area to the third area. The first wirings and the second wirings are arranged in different layers. The first wirings and the second wirings are connected in a one-to-one correspondence through via holes. The via holes are staggered in the second area.

First claim

What is claimed is:

1. A display panel, wherein the display panel has a first area, a second area, and a third area arranged in sequence, and the display panel comprises:
a substrate;
a plurality of first wirings, wherein the first wirings are arranged on the substrate and are arranged at intervals, and the first wirings extend from the first area to the second area; and
a plurality of second wirings, wherein the second wirings are arranged on the substrate and arranged at intervals, the second wirings extend from the second area to the third area, the first wirings and the second wirings are arranged in different layers, the first wirings and the second wirings are connected in a one-to-one correspondence through via holes, and the via holes are staggered in the second area;
wherein at least a part of the first wiring or at least a part of the second wiring has a bending wiring portion.

2. The display panel according to claim 1 , wherein the display panel further comprises an insulating layer, the insulating layer is arranged on a side of the first wiring and the second wiring away from the substrate, the insulating layer is provided with a through hole, and an orthographic projection of the via hole on the substrate is located within an orthographic projection of the through hole on the substrate.

3. The display panel according to claim 2 , wherein adjacent n through holes form a group, and corresponding via holes in each group of the through holes are arranged in a staggered manner, wherein n is a natural number greater than or equal to 2.

4. The display panel according to claim 1 , wherein the display panel further comprises a chip on film, the chip on film is arranged in the third area, the second wiring is connected with the chip on film, and the second area is a bending area.

5. The display panel according to claim 1 , wherein the bending wiring portion is arranged in the second area.

6. The display panel according to claim 1 , wherein the bending wiring portion comprises a plurality of bending units connected in sequence, the bending units are connected to at least one parallel wiring, and the parallel wiring is arranged in parallel with the bending wiring portion.

7. The display panel according to claim 1 , wherein a width of the first wiring is greater than a width of the second wiring.

8. The display panel according to claim 1 , wherein a vertical distance between the first wiring and the substrate is greater than a vertical distance between the second wiring and the substrate.

9. The display panel according to claim 8 , wherein the display panel further comprises an interlayer insulating layer, the interlayer insulating layer is arranged on the second wiring, the first wiring is arranged on the interlayer insulating layer, and the via hole is opened on the interlayer insulating layer.

10. A display device, wherein the display device comprises a display panel and a packaging structure, the display panel has a first area, a second area, and a third area arranged in sequence, and the display panel comprises:
a substrate;
a plurality of first wirings, wherein the first wirings are arranged on the substrate and are arranged at intervals, and the first wirings extend from the first area to the second area; and
a plurality of second wirings, wherein the second wirings are arranged on the substrate and arranged at intervals, the second wirings extend from the second area to the third area, the first wirings and the second wirings are arranged in different layers, the first wirings and the second wirings are connected in a one-to-one correspondence through via holes, and the via holes are staggered in the second area;
wherein the packaging structure is arranged on the display panel;
wherein at least a part of the first wiring or at least a part of the second wiring has a bending wiring portion.

11. The display device according to claim 10 , wherein the display panel further comprises a chip on film, the chip on film is arranged in the third area, the second wiring is connected with the chip on film, and the second area is a bending area.

12. The display device according to claim 10 , wherein the display panel further comprises an insulating layer, the insulating layer is arranged on a side of the first wiring and the second wiring away from the substrate, the insulating layer is provided with a through hole, and an orthographic projection of the via hole on the substrate is located within an orthographic projection of the through hole on the substrate.

13. The display device according to claim 12 , wherein adjacent n through holes form a group, and corresponding via holes in each group of the through holes are arranged in a staggered manner, wherein n is a natural number greater than or equal to 2.

14. The display device according to claim 10 , wherein a width of the first wiring is greater than a width of the second wiring.

15. The display device according to claim 10 , wherein the bending wiring portion is arranged in the second area.

16. The display device according to claim 10 , wherein the bending wiring portion comprises a plurality of bending units connected in sequence, the bending units are connected to at least one parallel wiring, and the parallel wiring is arranged in parallel with the bending wiring portion.

17. The display device according to claim 10 , wherein a vertical distance between the first wiring and the substrate is greater than a vertical distance between the second wiring and the substrate.

18. The display device according to claim 17 , wherein the display panel further comprises an interlayer insulating layer, the interlayer insulating layer is arranged on the second wiring, the first wiring is arranged on the interlayer insulating layer, and the via hole is opened on the interlayer insulating layer.

19. A display panel, wherein the display panel has a first area, a second area, and a third area arranged in sequence, and the display panel comprises:
a substrate;
a plurality of first wirings, wherein the first wirings are arranged on the substrate and are arranged at intervals, and the first wirings extend from the first area to the second area; and
a plurality of second wirings, wherein the second wirings are arranged on the substrate and arranged at intervals, the second wirings extend from the second area to the third area, the first wirings and the second wirings are arranged in different layers, the first wirings and the second wirings are connected in a one-to-one correspondence through via holes, and the via holes are staggered in the second area;
wherein the display panel further comprises a chip on film, the chip on film is arranged in the third area, the second wiring is connected with the chip on film, and the second area is a bending area.

20. The display device according to claim 19 , wherein at least a part of the first wiring or at least a part of the second wiring has a bending wiring portion.

Assignees

• Shenzhen China Star Optoelectronics Semiconductor Display Tech Co Ltd

Inventors

• Li Mingming
• Han Baixiang

Classifications

• G02F1/13458

  Terminal pads · CPC title

• G02F1/133305

  Flexible substrates, e.g. plastics, organic film · CPC title

• G02F1/13452 Primary

  Conductors connecting driver circuitry and terminals of panels · CPC title

• G02F1/1345 Primary

  Conductors connecting electrodes to cell terminals · CPC title