Integration of OE devices with ICS

US12174441B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12174441-B2
Application numberUS-202318493232-A
CountryUS
Kind codeB2
Filing dateOct 24, 2023
Priority dateOct 8, 2020
Publication dateDec 24, 2024
Grant dateDec 24, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Optical interconnects for IC chips may include optical sources and receivers integrated with the IC chips. MicroLEDs may be mounted on an interconnect layer of the IC chip, and embedded within a waveguide. Photodetectors to receive light from the waveguide may be fabricated in a top surface of a semiconductor substrate, below a level of the interconnect layer, but with a passageway for light through the interconnect layer.

First claim

Opening claim text (preview).

What is claimed is: 1. An optical interconnect comprising: a first waveguide on top of an interconnect layer of an integrated circuit (IC) chip, the IC chip comprising an optical interconnect IC, the IC chip including a semiconductor substrate and an interconnect layer on top of the semiconductor substrate; an optical transmitter embedded in the first waveguide, the optical transmitter comprising a microLED having a bottom connected to a pad coupled to a first electrical signal path in the interconnect layer, a top contact of the microLED coupled to a second electrical signal path in the interconnect layer; transmit circuitry in the semiconductor substrate of the optical interconnect IC, the transmit circuitry configured to drive the microLED; a photodetector in the semiconductor substrate of the IC chip, under a level of the interconnect layer, the optical receiver optically coupled to the first waveguide; receive circuitry in the semiconductor substrate of the optical interconnect IC, the receive circuitry coupled to the photodetector; and wherein a region of the interconnect layer above the photodetector has no metal layers; and wherein the microLED has an emitting region of less than 10 microns by 10 microns. 2. The optical interconnect of claim 1 , further comprising a first reflector and a second reflector, wherein the first reflector is positioned near a first end of the first waveguide nearest to the microLED, and the second reflector is positioned to optically couple the photodetector and the second waveguide. 3. The optical interconnect of claim 1 , wherein the region of the interconnect layer above the photodetector has no dielectric layers. 4. The optical interconnect of claim 1 , further comprising a first IC electrically attached to the optical interconnect IC and a second IC electrically attached to the optical interconnect IC. 5. The optical interconnect of claim 4 , wherein the first IC is communicatively coupled to the transmit circuitry in the optical interconnect IC and the second IC is communicatively coupled to the receive circuitry in the optical interconnect IC.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device (G02B6/4246 takes precedence) · CPC title

  • Bidirectionally operating package structures · CPC title

  • Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

  • Optical field-shaping means, e.g. lenses · CPC title

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What does patent US12174441B2 cover?
Optical interconnects for IC chips may include optical sources and receivers integrated with the IC chips. MicroLEDs may be mounted on an interconnect layer of the IC chip, and embedded within a waveguide. Photodetectors to receive light from the waveguide may be fabricated in a top surface of a semiconductor substrate, below a level of the interconnect layer, but with a passageway for light th…
Who is the assignee on this patent?
Avicenatech Corp
What technology area does this patent fall under?
Primary CPC classification G02B6/43. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 24 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).