Method for coloring circuit layout and system for performing the same

Patent metadata

Field	Value
Publication number	US-12159092-B2
Application number	US-202318226677-A
Country	US
Kind code	B2
Filing date	Jul 26, 2023
Priority date	Sep 28, 2017
Publication date	Dec 3, 2024
Grant date	Dec 3, 2024

Abstract

Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.

First claim

What is claimed is:

1. A method of manufacturing a photomask, comprising:
receiving a circuit layout;
identifying target networks in the circuit layout, each of the target networks having two or more linked nodes representing circuit patterns, each of the target networks being presented in an imaginary X-Y coordinate plane;
determining a starting node in each of the target networks using a coordinate-based method;
assigning a first feature to the starting node as a first node in each of the target networks and assigning the first feature and a second feature to remaining nodes in each target network so that any two immediately adjacent linked nodes in each target network have different features;
outputting mask data based on the first feature and the second feature; and
manufacturing one or more photomasks based on the mask data.

2. The method of claim 1 , wherein the assigning the first feature and the second feature comprises a coordinate-based method including:
(i) assigning the first feature to the first node in each of the target networks;
(ii) assigning the first node assigned with the first feature to a first photomask;
(iii) assigning the second feature to a second node in each of the target networks;
(iv) assigning the second node assigned with the second feature to a second photomask; and
repeating (ii)-(iv) to remaining nodes in each of the target networks until any two immediately adjacent linked nodes in the target network have different features.

3. The method of claim 1 , wherein a distance between any two immediately adjacent linked nodes in each of the target networks is less than a minimum separation distance.

4. The method of claim 3 , wherein the minimum separation distance is about 70 nm to about 120 nm.

5. The method of claim 1 , wherein the first node has a lowest X coordinate and a lowest Y coordinate.

6. The method of claim 1 , wherein the first node has a lowest X coordinate and a largest Y coordinate.

7. The method of claim 1 , wherein the first node has a largest X coordinate and a lowest Y coordinate.

8. The method of claim 1 , wherein the first node has a largest X coordinate and a largest Y coordinate.

9. A method of manufacturing a photomask, comprising:
receiving a multiple-patterning technology (MPT)-compliant circuit layout having a plurality of nodes, each node representing a circuit pattern;
assigning a number to an analysis counter;
identifying nodes being separated by a distance less than a minimum separation distance as target networks, the target networks being presented in an imaginary X-Y coordinate plane;
identifying a first node in each target network using a coordinate-based method;
assigning a first color to the first node in each target network;
assigning the first color and a second color to remaining nodes in the target networks in an alternating manner so that any two immediately adjacent nodes in the target network have different colors;
updating the analysis counter;
analyzing the MPT-compliant circuit layout based on the analysis counter;
outputting mask data based on the first color and the second color; and
manufacturing one or more photomasks based on the mask data.

10. The method of claim 9 , wherein the minimum separation distance is about 70 nm to about 120 nm.

11. The method of claim 9 , wherein the first node has a lowest X coordinate and a lowest Y coordinate.

12. The method of claim 9 , wherein the first node has a lowest X coordinate and a largest Y coordinate.

13. The method of claim 9 , wherein the first node has a largest X coordinate and a lowest Y coordinate.

14. The method of claim 9 , wherein the first node has a largest X coordinate and a largest Y coordinate.

15. The method of claim 9 , further comprising:
storing one or more target networks having a unique coloring combination in a storage medium;
identifying networks in a different circuit layout or different regions of a same circuit layout having an arrangement of nodes identical or similar to the stored target networks; and
assigning the unique coloring combination to the identified networks.

16. A method of manufacturing a photomask, comprising:
receiving circuit data from a design rule checker;
assigning a number to an analysis counter;
identifying a first node in a G0-linked network using a coordinate-based method, the G0-linked network being presented in an imaginary X-Y coordinate plane in a computer;
assigning a first feature to the identified first node in the G0-linked network;
assigning the first feature and a second feature to remaining nodes in the G0-linked network in an alternating manner;
updating the analysis counter until any two immediately adjacent linked nodes in a target network have different features;
analyzing the design rule checker based on the analysis counter;
outputting mask data based on the first feature and the second feature; and
manufacturing one or more photomasks based on the mask data.

17. The method of claim 16 , comprising checking a circuit layout and identifying the G0-linked networks having two or more linked nodes representing circuit patterns in the circuit layout.

18. The method of claim 16 , wherein the first and second features are selected from the group consisting of colors, shapes, numbers, icons, and symbols.

19. The method of claim 16 , further comprising:
assigning first and second photomasks to nodes assigned with the first feature and the second feature, respectively; and
storing input data used by the computer, the input data comprising one or more G0-linked networks having a coloring combination unique to the one or more G0-linked networks.

20. The method of claim 16 , wherein the coordinate-based method identifies a first node having a lowest X coordinate and a lowest Y coordinate, a lowest X coordinate and a largest Y coordinate, a largest X coordinate and a lowest Y coordinate, or a largest X coordinate and a largest Y coordinate.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chiang Chia-Ping
• Chih Ming-Hui
• Hsu Chih-Wei
• Wu Ping-Chieh
• Chang ya-ting
• Wang Tsung-Yu
• Cheng Wen-Li
• Yin Hui En
• Huang Wen-Chun
• Liu Ru-Gun
• Gau Tsai-Sheng

Classifications

• G03F7/70466

  Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature (stitching G03F7/70475) · CPC title

• G03F1/70 Primary

  Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging · CPC title

• G06F30/39 Primary

  Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347) · CPC title

• G06F30/392 Primary

  Floor-planning or layout, e.g. partitioning or placement · CPC title