Apparatus and method for driving an optical modulator with independent modulator arm bias

Patent metadata

Field	Value
Publication number	US-12158639-B2
Application number	US-202217679532-A
Country	US
Kind code	B2
Filing date	Feb 24, 2022
Priority date	Aug 24, 2018
Publication date	Dec 3, 2024
Grant date	Dec 3, 2024

Abstract

Driving an optical modulator is described. A control circuit generates first and second target voltages based on a target phase modulation between first and second optical waveguide arms of the optical modulator. An offset control circuit generates first and second offset signals. A linear modulator driver receives the first and second target voltages and the first and second offset signals, and generates a first output voltage for biasing the first optical waveguide arm and a second output voltage for biasing the second optical waveguide arm. Feedback circuitry can feed the first and second output voltages to the offset control circuit, which can generate the first and second offset signals using the first and second output voltages. The output voltages bias the waveguide arms so the optical modulator operates close to the target phase modulation, even in the presence of manufacturing errors.

First claim

What is claimed is:

1. An apparatus comprising:
an optical modulator configured to produce a target phase modulation between a first optical waveguide arm and a second optical waveguide arm of an optical modulator;
a linear modulator driver coupled to the optical modulator, the linear modulator driver comprising an emitter follower differential stage that includes a first transistor and a second transistor, wherein an emitter of the first transistor is coupled to the first optical waveguide arm of the optical modulator and an emitter of the second transistor is coupled to the second optical waveguide arm of the optical modulator; and
an offset control circuit coupled to the linear modulator driver, the offset control circuit configured to set the first transistor in a first operating state for providing a first operating bias to the first optical waveguide arm of the optical modulator and the second transistor in a second operating state for providing a second operating bias to the second optical waveguide arm of the optical modulator, whereby the first optical waveguide arm exhibits a first modulation characteristic and the second optical waveguide arm exhibits a second modulation characteristic that is different than the first modulation characteristic.

2. The apparatus of claim 1 , wherein the offset control circuit is configured to place the first transistor in the first operating state based on an amplitude of a first collector-to-emitter current flow through the first transistor, and further wherein the offset control circuit is further configured to place the second transistor in the second operating state based on an amplitude of a second collector-to-emitter current flow through the second transistor.

3. The apparatus of claim 2 , wherein the first collector-to-emitter current flow through the first transistor is substantially equal to a first current that flows through the first optical waveguide arm and produces the first operating bias, and further wherein the second collector-to-emitter current flow through the second transistor is substantially equal to a second current that flows through the second optical waveguide arm and produces the second operating bias.

4. The apparatus of claim 3 , further comprising a first terminating resistor coupled between the first optical waveguide arm and a ground node and a second terminating resistor coupled between the second optical waveguide arm and the ground node, whereby a first load imposed upon the emitter of the first transistor consists of the first optical waveguide arm coupled in series with the first terminating resistor, and whereby a second load imposed upon the emitter of the second transistor consists of the second optical waveguide arm coupled in series with the second terminating resistor.

5. The apparatus of claim 1 , wherein the emitter follower differential stage further includes a third transistor and a fourth transistor, the third transistor arranged in a first cascade arrangement with the first transistor and the fourth transistor arranged in a second cascade arrangement with the second transistor.

6. The apparatus of claim 1 , wherein the emitter follower differential stage further includes a third transistor and a fourth transistor, the third transistor coupled to the first transistor in a first customized Darlington configuration, the fourth transistor coupled to the second transistor in a second customized Darlington configuration.

7. The apparatus of claim 6 , wherein the first customized Darlington configuration comprises a collector of the first transistor coupled to a first supply voltage and a collector of the third transistor coupled to a second supply voltage, and wherein the second customized Darlington configuration comprises a collector of the second transistor coupled to the first supply voltage and a collector of the fourth transistor coupled to the second supply voltage.

8. The apparatus of claim 7 , wherein an emitter of the third transistor is coupled via a first resistor to a third supply voltage and an emitter of the fourth transistor is coupled via a second resistor to the third supply voltage.

9. The apparatus of claim 6 , wherein a collector of the first transistor is coupled to a first supply voltage, a collector of the second transistor is coupled to the first supply voltage, a collector of the third transistor is coupled to a second supply voltage, and a collector of the fourth transistor is coupled to the second supply voltage, wherein an amplitude of the first supply voltage is lower than an amplitude of the second supply voltage.

10. The apparatus of claim 6 , wherein the second modulation characteristic is settable to be different than the first modulation characteristic to compensate for at least one of a first structural mismatch between the first optical waveguide arm and the second optical waveguide arm of the optical modulator during manufacture and/or to compensate for a second structural mismatch between at least two of the first transistor, the second transistor, the third transistor, and the fourth transistor, during manufacture.

11. The apparatus of claim 6 , wherein the offset control circuit is configured to place the second transistor in the first operating state based on an amplitude of a first collector-to-emitter current flow in the second transistor, and further wherein the offset control circuit is further configured to place the fourth transistor in the second operating state based on an amplitude of a second collector-to-emitter current flow in the fourth transistor.

12. A method, comprising:
receiving, by a linear modulator driver, from an offset control circuit, a first offset control signal and a second offset control signal, the linear modulator driver comprising an emitter follower differential stage that includes a first transistor and a second transistor;
producing at an emitter of the first transistor, based on the first offset control signal, a first operating bias for biasing a first optical waveguide arm of an optical modulator, whereby the first optical waveguide arm exhibits a first modulation characteristic; and
producing at an emitter of the second transistor, based on the second offset control signal, a second operating bias for biasing a second optical waveguide arm of the optical modulator, whereby the second optical waveguide arm exhibits a second modulation characteristic that is different than the first modulation characteristic.

13. The method of claim 12 , further comprising:
calibrating an offset between the first offset control signal and the second offset control signal to minimize a difference between a target modulation and an actual modulation of the optical modulator.

14. The method of claim 13 , wherein the first offset control signal is a first offset current and the second offset control signal is a second offset current, and the method further comprises:
receiving, by the linear modulator driver, a first target voltage and a second target voltage;
modifying the first target voltage using the first offset current;
modifying the second target voltage using the second offset current; and
coupling the modified first target voltage into a base of the first transistor and coupling the modified second target voltage into a base of the second transistor, whereby the optical modulator provides the target modulation.

15. The method of claim 14 , wherein the first operating bias that is coupled into the first optical waveguide arm of the optical modulator from the emitter of the first transistor tracks the modified first target voltage applied to the base of the first transist

Assignees

• Ciena Corp

Inventors

• Vitic Michael
• Falt Christopher Edgar

Classifications

• G02F1/2257

  the optical waveguides being made of semiconducting material · CPC title

• G02F1/212

  Mach-Zehnder type · CPC title

• G02F1/0123 Primary

  Circuits for the control or stabilisation of the bias voltage, e.g. automatic bias control [ABC] feedback loops · CPC title

• G02F1/025 Primary

  in an optical waveguide structure (G02F1/017, {G02F1/2257} take precedence) · CPC title