Technologies for increased volumetric and functional efficiencies of optical packages

US12153268B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12153268-B2
Application numberUS-202217646784-A
CountryUS
Kind codeB2
Filing dateJan 3, 2022
Priority dateJan 3, 2022
Publication dateNov 26, 2024
Grant dateNov 26, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Optical packages and methods of assembly are described in which various optical structures are integrated to increase efficiency. In an embodiment, an optical package includes an optical component with integrated guard fence to prevent the flow of adjacent opaque insulating material onto an optical surface. Additional optic structures are described such as light blocking structures within routing layer to reduce total internal reflection (TIR) within the routing layers, optical lenses, and the use of sacrificial layers to protect optical surfaces of the optical components during assembly.

First claim

Opening claim text (preview).

What is claimed is: 1. An optical package comprising: a back side routing layer including a top side and bottom side; a printed circuit board (PCB) core on the top side of the back side routing layer, the PCB core including a plurality of vertical vias and a first cavity; an optical component mounted within the first cavity, wherein a top side of the optical component includes a guard fence surrounding an optical surface; an insulating material encapsulating the optical component within the first cavity, wherein the insulating material does not penetrate inside the guard fence; and a front side routing layer on top of the PCB core and the optical component, wherein the front side routing layer includes a transparent dielectric layer spanning over the optical component. 2. The optical package of claim 1 , wherein the insulating material is opaque. 3. The optical package of claim 2 , wherein the transparent dielectric layer at least partially fills a volume inside the guard fence. 4. The optical package of claim 1 , wherein the top side of the optical component includes a first contact terminal, and the front side routing layer includes a wiring trace in electrical contact with the first contact terminal. 5. The optical package of claim 4 , wherein the contact terminal is outside of the guard fence. 6. The optical package of claim 5 , wherein a surrounding top surface of the guard fence is elevated above a first top surface of the first contact terminal. 7. The optical package of claim 1 , further comprising a controller chip mounted face up within a second cavity in the PCB core, and the front side routing layer spans over and makes electrical contact with the controller chip. 8. The optical package of claim 1 , wherein the back side routing layer includes: a portion of the insulating material spanning over a back side of the PCB core; and a plurality of vias extend through the insulating material to contact the PCB core.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • Mechanical or electrical aspects of the light guide and light source in the lighting device peculiar to the adaptation to planar light guides, e.g. concerning packaging · CPC title

  • with electrical insulation means · CPC title

  • Manufacturing aspects; Material aspects · CPC title

  • Light guide, e.g. taper · CPC title

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What does patent US12153268B2 cover?
Optical packages and methods of assembly are described in which various optical structures are integrated to increase efficiency. In an embodiment, an optical package includes an optical component with integrated guard fence to prevent the flow of adjacent opaque insulating material onto an optical surface. Additional optic structures are described such as light blocking structures within routi…
Who is the assignee on this patent?
Apple Inc
What technology area does this patent fall under?
Primary CPC classification G02B6/428. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 26 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).