Printed circuit board and method of producing printed circuit board

US12144111B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12144111-B2
Application numberUS-202217647574-A
CountryUS
Kind codeB2
Filing dateJan 10, 2022
Priority dateJan 12, 2021
Publication dateNov 12, 2024
Grant dateNov 12, 2024

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed circuit board capable of reducing or suppressing connection failure includes a base film made of insulating material, an electric conductor pattern formed on a front surface of the base film, and an insulating cover film covering the electric conductor pattern. The printed circuit board also includes a circuit portion with a circuit formed by the electric conductor pattern, and a pad portion with a bonding pad composed of the electric conductor pattern exposed from the insulating cover film. The pad portion has higher rigidity than the circuit portion.

First claim

Opening claim text (preview).

What is claimed is: 1. A printed circuit board having at least a circuit portion and a pad portion separately located from the circuit portion, the printed circuit board comprising: a base film extended across the circuit portion and the pad portion, the base film being made of an insulating material; a first electric conductor pattern formed on a front surface of the base film, the first electric conductor pattern forming: a circuit in the circuit portion, and a bonding pad in the pad portion, the bonding pad being connected to an IC chip via a bonding wire by using a capillary; a first insulating cover film entirely covering the first electric conductor pattern except for the bonding pad, a second electric conductor pattern directly formed on a back surface of the base film; and a pad reinforcing layer disposed at least in the pad portion below the base film, wherein rigidity of the pad portion is higher than rigidity of the circuit portion, and wherein the pad reinforcing layer is made of metal insulated from the second electric conductor pattern. 2. The printed circuit board as claimed in claim 1 , wherein the first electric conductor pattern is thicker in the pad portion than that in the circuit portion. 3. The printed circuit board as claimed in claim 1 , further comprising a metal plating layer covering at least the bonding pad, wherein a thickness of the metal plating layer is approximately 4 μm or more. 4. The printed circuit board as claimed in claim 1 , further comprising a first adhesive layer to cover the first electric conductor pattern and bond the first insulating cover film to the first electric conductor pattern, wherein at least one of the base film, the first insulating cover film, and the first adhesive layer located at least in the pad portion is made of material having an elastic modulus of approximately 1.5 GPa or more. 5. The printed circuit board as claimed in claim 1 , further comprising an adhesive layer to cover the first electric conductor pattern and bond the first insulating cover film to the first electric conductor pattern, wherein a thickness of at least one of the base film, the first insulating cover film, and the adhesive layer located at least in the pad portion is approximately 10 μm or less. 6. The printed circuit board as claimed in claim 1 , wherein the second electric conductor pattern is continuously formed over the pad portion. 7. The printed circuit board as claimed in claim 1 , further comprising: at least one circuit formed by one of the first electric conductor pattern and the second electric conductor pattern; and a bonding pad composed of a part of the first electric conductor pattern exposed from the first insulating cover film, wherein the second electric conductor pattern is continuously formed entirely covering the pad portion. 8. The printed circuit board as claimed in claim 1 , wherein one of the first electric conductor pattern and the second electric conductor pattern located in the pad portion is thicker than corresponding one of the first electric conductor pattern and the second electric conductor pattern located in the circuit portion. 9. The printed circuit board as claimed in claim 1 , further comprising a reinforcing layer disposed in the pad portion below the bonding pad to reinforce the pad portion, the reinforcing layer being made of metal insulated from both the first electric conductor pattern and the second electric conductor pattern. 10. The printed circuit board as claimed in claim 1 , further comprising: a first adhesive layer to cover the first electric conductor pattern and bond the first insulating cover film to the first electric conductor pattern; a second insulating cover film covering the second electric conductor pattern; a second adhesive layer to cover the second electric conductor pattern and bond the second insulating cover film to the second electric conductor pattern; a board reinforcing plate to reinforce the printed circuit board; and a third adhesive layer to bond the second insulating cover film to the board reinforcing plate, wherein at least any one of the base film, the first insulating cover film, the first adhesive layer, the second insulating cover film, the second adhesive layer, and the third adhesive layer is made of material with an elastic modulus of about 1.5 GPa or more. 11. The printed circuit board as claimed in claim 1 , further comprising: a first adhesive layer to cover the first electric conductor pattern and bond the first insulating cover film to the first electric conductor pattern; a second insulating cover film to cover the second electric conductor pattern; a second adhesive layer to cover the second electric conductor pattern and bond the second insulating cover film to the second electric conductor pattern; a board reinforcing plate to reinforce the printed circuit board; and a third adhesive layer to bond the second insulating cover film to the board reinforcing plate, wherein a thickness of at least any one of the base film, the first insulating cover film, the first adhesive layer, the second insulating cover film, the second adhesive layer, and the third adhesive layer is less than 10 μm. 12. The printed circuit board as claimed in claim 1 , wherein the pad reinforcing layer is disposed at least in the pad portion below the base film. 13. The printed circuit board as claimed in claim 1 , wherein the pad reinforcing layer is insulated from the first electric conductor pattern, the second electric conductor pattern and the bonding pad. 14. The printed circuit board as claimed in claim 1 , wherein the pad reinforcing layer is formed across the longitudinal direction of the pad portion.

Assignees

Inventors

Classifications

  • between a chip and a laterally-adjacent insulating package substrate, interpose or RDL · CPC title

  • the connected ends being ball-shaped · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Aligning · CPC title

  • Means for applying energy, e.g. ovens or lasers · CPC title

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Frequently asked questions

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What does patent US12144111B2 cover?
A printed circuit board capable of reducing or suppressing connection failure includes a base film made of insulating material, an electric conductor pattern formed on a front surface of the base film, and an insulating cover film covering the electric conductor pattern. The printed circuit board also includes a circuit portion with a circuit formed by the electric conductor pattern, and a pad …
Who is the assignee on this patent?
Denso Corp
What technology area does this patent fall under?
Primary CPC classification H05K3/244. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 12 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).