Front-end sampling circuit and method for sampling signal

Patent metadata

Field	Value
Publication number	US-12143118-B2
Application number	US-202217864471-A
Country	US
Kind code	B2
Filing date	Jul 14, 2022
Priority date	Nov 5, 2021
Publication date	Nov 12, 2024
Grant date	Nov 12, 2024

Abstract

A front-end sampling circuit includes a global switch, a local switch, and an auxiliary switch. The global switch is configured to be selectively turned on according to a first control signal, in order to transmit an input signal. The local switch is configured to be selectively turned on according to a second control signal, in order to transmit the input signal from the global switch to a node, wherein a storage circuit is coupled to the node to store the input signal. The auxiliary switch is configured to be selectively turned on according to a third control signal, in order to transmit the input signal to the node, in which a turn-off time point of the auxiliary switch is set to be the same or earlier than a turn-off time point of the global switch.

First claim

What is claimed is:

1. A front-end sampling circuit, comprising:
a global switch configured to be selectively turned on according to a first control signal, in order to transmit an input signal;
a local switch configured to be selectively turned on according to a second control signal, in order to transmit the input signal from the global switch to a node, wherein a storage circuit is coupled to the node to store the input signal; and
an auxiliary switch configured to be selectively turned on according to a third control signal, in order to transmit the input signal to the node,
wherein a turn-off time point of the auxiliary switch is set to be the same or earlier than a turn-off time point of the global switch.

2. The front-end sampling circuit of claim 1 , wherein a first terminal of the global switch and a first terminal of the auxiliary switch receive the input signal, and a second terminal of the global switch is coupled to the node via the local switch.

3. The front-end sampling circuit of claim 1 , wherein a turn-on time point of the local switch is earlier than a turn-on time point of the global switch, and a turn-off time point of the local switch is later than the turn-off time point of the global switch.

4. The front-end sampling circuit of claim 3 , wherein a turn-on time point of the auxiliary switch is earlier than or the same as the turn-on time point of the local switch.

5. The front-end sampling circuit of claim 1 , wherein a turn-on time point of the local switch is later than a turn-on time point of the global switch, and a turn-off time point of the local switch is later than the turn-off time point of the global switch.

6. The front-end sampling circuit of claim 5 , wherein a turn-on time point of the local switch is earlier than or the same as the turn-on time point of the global switch.

7. The front-end sampling circuit of claim 1 , further comprising:
a capacitor coupled to the global switch to receive the input signal from the global switch and configured to store the input signal to be a sampled signal; and
a buffer circuit coupled to the capacitor and configured to transmit the sampled signal to the local switch,
wherein the local switch is further configured to transmit the sampled signal to the node, and the storage circuit is further configured to store the sampled signal.

8. The front-end sampling circuit of claim 7 , wherein a turn-on time point of the auxiliary switch is earlier than, later than, or equal to a turn-on time point of the global switch, and a turn-on time point of the local switch is later than the turn-off time point of the global switch.

9. The front-end sampling circuit of claim 1 , wherein a specification requirement of the auxiliary switch is lower than a specification requirement of the global switch or the local switch.

10. The front-end sampling circuit of claim 1 , wherein the storage circuit is a sample and hold circuit in a channel of a time interleaved analog to digital converter.

11. A signal sampling method, comprising:
selectively turning on a global switch according to a first control signal, in order to transmit an input signal;
selectively turning on a local switch according to a second control signal, in order to transmit the input signal from the global switch to a node, wherein a storage circuit is coupled to the node to store the input signal; and
selectively turning on an auxiliary switch according to a third control signal, in order to transmit the input signal to the node,
wherein a turn-off time point of the auxiliary switch is set to be earlier than or the same as a turn-off time point of the global switch.

12. The signal sampling method of claim 11 , wherein a first terminal of the global switch and a first terminal of the auxiliary switch receive the input signal, and a second terminal of the global switch is coupled to the node via the local switch.

13. The signal sampling method of claim 11 , wherein a turn-on time point of the local switch is earlier than a turn-on time point of the global switch, and a turn-off time point of the local switch is later than the turn-off time point of the global switch.

14. The signal sampling method of claim 13 , wherein a turn-on time point of the auxiliary switch is earlier than or the same as the turn-on time point of the local switch.

15. The signal sampling method of claim 11 , wherein a turn-on time point of the local switch is later than a turn-on time point of the global switch, and a turn-off time point of the local switch is later than the turn-off time point of the global switch.

16. The signal sampling method of claim 15 , wherein a turn-on time point of the local switch is earlier than or the same as the turn-on time point of the global switch.

17. The signal sampling method of claim 11 , further comprising:
receiving, by a capacitor, the input signal from the global switch, in order to store the input signal to be a sampled signal; and
transmitting, by a buffer circuit, the sampled signal to the local switch,
wherein the local switch is further configured to transmit the sampled signal to the node, and the storage circuit is further configured to store the sampled signal.

18. The signal sampling method of claim 17 , wherein a turn-on time point of the local switch is later than the turn-off time point of the global switch.

19. The signal sampling method of claim 17 , wherein a turn-on time point of the auxiliary switch is earlier than, later than, or equal to a turn-on time point of the global switch.

20. The signal sampling method of claim 11 , wherein a specification requirement of the auxiliary switch is lower than a specification requirement of the global switch or the local switch.

Assignees

• Realtek Semiconductor Corp

Inventors

• Huang Shih-Hsiung
• Wu Yen-Ting
• Hong Wei-Cian

Classifications

• H03M1/1215

  using time-division multiplexing · CPC title

• G11C27/024

  using a capacitive memory element (G11C27/04 takes precedence) · CPC title

• H03M1/1245 Primary

  Details of sampling arrangements or methods · CPC title