Successive approximation register analog to digital converter device and signal conversion method

US12107597B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12107597-B2
Application numberUS-202217857621-A
CountryUS
Kind codeB2
Filing dateJul 5, 2022
Priority dateOct 13, 2021
Publication dateOct 1, 2024
Grant dateOct 1, 2024

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Abstract

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A successive approximation register analog to digital converter includes a charge injection digital to analog converter (DAC) circuit, a comparator circuit, and a control logic circuitry. The charge injection DAC circuit includes capacitors that sample input signals to generate first and second signals and charge injection circuits that selectively adjust the first or the second signals according to enable signals and decision signals. The comparator circuit compares the first and second signals to generate the decision signals. The control logic circuitry controls a circuit of the charge injection circuits to adjust the first and the second signals during an initial phase, in order to adjust a switching sequence of the circuit according to the decision signals corresponding to the initial phase, and generates the enable signals according to the decision signals and the adjusted switching sequence during a conversion phase to generate a digital output.

First claim

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What is claimed is: 1. A successive approximation register analog to digital converter, comprising: a charge injection digital to analog converter circuit comprising a plurality of capacitors and a plurality of charge injection circuits, wherein the plurality of capacitors are configured to respectively sample a plurality of input signals to generate a first signal and a second signal, and the plurality of charge injection circuits are configured to selectively adjust at least one of the first signal or the second signal according to a plurality of enable signals and a plurality of decision signals; a comparator circuit configured to compare the first signal with the second signal to generate the plurality of decision signals; and a control logic circuitry configured to control a first charge injection circuit in the plurality of charge injection circuits to adjust the first signal and the second signal during an initial phase to adjust a switching sequence of the first charge injection circuit according to the plurality of decision signals corresponding to the initial phase, and generate the plurality of enable signals according to the plurality of decision signals and an adjusted switching sequence during an analog to digital conversion phase, in order to generate a digital output, wherein the control logic circuitry is further configured to store a corresponding relation between the plurality of enable signals and the adjusted switching sequence. 2. The successive approximation register analog to digital converter of claim 1 , wherein the control logic circuitry is configured to adjust the switching sequence based on currents of a plurality of current source circuits in the first charge injection circuit during the initial phase. 3. The successive approximation register analog to digital converter of claim 1 , wherein during the initial phase, the control logic circuitry is configured to control a first current source circuit in the first charge injection circuit to adjust the first signal and control a second current source circuit in the first charge injection circuit to adjust the second signal, the comparator circuit is further configured to repeatedly compare the first signal with the second signal to generate the plurality of decision signals corresponding to the initial phase, and the control logic circuitry is further configured to determine a difference between a current value of the first current source circuit and a current value of the second current source circuit according to the plurality of decision signals corresponding to the initial phase, in order to adjust the switching sequence. 4. The successive approximation register analog to digital converter of claim 1 , wherein the first charge injection circuit comprises a plurality of current source circuits, and the control logic circuitry is configured to gradually sum up currents of the plurality of current source circuits based on an ascending order to adjust the switching sequence. 5. The successive approximation register analog to digital converter of claim 1 , wherein the plurality of charge injection circuits are configured to selectively adjust charges stored in at least one of the plurality of capacitors according to the plurality of enable signals and the plurality of decision signals, in order to adjust at least one of the first signal or the second signal. 6. The successive approximation register analog to digital converter of claim 1 , wherein the first charge injection circuit comprises: a plurality of control circuits, wherein each of the plurality of control circuits is configured to generate one of a plurality of switching signals according to a corresponding one of the plurality of enable signals and the plurality of decision signals; a plurality of switching circuits, wherein each of the switching circuits is configured to be selectively connected to one of the plurality of capacitors or disconnected from the plurality of capacitors according to a corresponding one of the plurality of switching signals; and a plurality of current source circuits, wherein each of the plurality of current source circuits is configured to discharge the one of the plurality of capacitors via a corresponding one of the plurality of switching circuits. 7. A signal conversion method, comprising: respectively sampling, by a plurality of capacitors, a plurality of input signals to generate a first signal and a second signal; selectively adjusting, by a plurality of charge injection circuits, at least one of the first signal or the second signal according to a plurality of enable signals and a plurality of decision signals; comparing the first signal with the second signal to generate the plurality of decision signals; controlling a first charge injection circuit in the plurality of charge injection circuits to adjust the first signal and the second signal during an initial phase, in order to adjust a switching sequence of the first charge injection circuit according to the plurality of decision signals corresponding to the initial phase; generating the plurality of decision signals according to the plurality of decision signals and an adjusted switching sequence during an analog to digital conversion phase, in order to generate a digital output; and storing a corresponding relation between the plurality of enable signals and the adjusted switching sequence. 8. The signal conversion method of claim 7 , wherein controlling the first charge injection circuit in the plurality of charge injection circuits to adjust the first signal and the second signal during the initial phase, in order to adjust the switching sequence of the first charge injection circuit according to the plurality of decision signals corresponding to the initial phase comprises: adjusting the switching sequence based on currents of a plurality of current source circuits in the first charge injection circuit during the initial phase. 9. The signal conversion method of claim 7 , wherein controlling the first charge injection circuit in the plurality of charge injection circuits to adjust the first signal and the second signal during the initial phase, in order to adjust the switching sequence of the first charge injection circuit according to the plurality of decision signals corresponding to the initial phase comprises: adjusting, by a first current source circuit in the first charge injection circuit, the first signal during the initial phase; adjusting, by a second current source circuit in the first charge injection circuit, the second signal during the initial phase; repeatedly comparing the first signal with the second signal, in order to generate the plurality of decision signals corresponding to the initial phase; and determining a difference between a current value of the first current source circuit and a current value of the second current source circuit according to the plurality of decision signals corresponding to the initial phase, in order to adjust the switching sequence. 10. The signal conversion method of claim 7 , wherein the first charge injection circuit comprises a plurality of current source circuits, and controlling the first charge injection circuit in the plurality of charge injection circuits to adjust the first signal and the second signal during the initial phase, in order to adjust the switching sequence of the first charge injection circuit according to the plurality of decision signals corresponding to the initial phase comprises: gradually summing up currents of the plurality of current source circuits based on an ascending order to adjust the switching sequence. 11. The signal conversion method of claim 7 , wherein selectively ad

Assignees

Inventors

Classifications

  • H03M1/1245Primary

    Details of sampling arrangements or methods · CPC title

  • over the full range of the converter, e.g. for correcting differential non-linearity · CPC title

  • with equal currents which are switched by unary decoded digital signals · CPC title

  • H03M1/468Primary

    in which the input S/H circuit is merged with the feedback DAC array · CPC title

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What does patent US12107597B2 cover?
A successive approximation register analog to digital converter includes a charge injection digital to analog converter (DAC) circuit, a comparator circuit, and a control logic circuitry. The charge injection DAC circuit includes capacitors that sample input signals to generate first and second signals and charge injection circuits that selectively adjust the first or the second signals accordi…
Who is the assignee on this patent?
Realtek Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification H03M1/1245. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).