Oxide thin film transistor and method for driving the same, display device

Patent metadata

Field	Value
Publication number	US-12107089-B2
Application number	US-202017294968-A
Country	US
Kind code	B2
Filing date	Sep 2, 2020
Priority date	Oct 12, 2019
Publication date	Oct 1, 2024
Grant date	Oct 1, 2024

Abstract

An oxide thin film transistor includes a gate electrode, and a first active layer structure and a second active layer structure arranged subsequently, the first active layer structure includes a first conductive connection portion and a second conductive connection portion arranged oppositely, the second active layer structure includes a third conductive connection portion and a fourth conductive connection portion arranged oppositely, and the second oxide semiconductor pattern respectively coupled to the third conductive connection portion and the fourth conductive connection portion, and an orthographic projection of the first oxide semiconductor pattern on the substrate and an orthographic projection of the second oxide semiconductor pattern on the substrate are both located within an orthographic projection of the gate electrode on the substrate, the second conductive connection portion is coupled to the third conductive connection portion.

First claim

What is claimed is:

1. An oxide thin film transistor, comprising:
a gate electrode arranged on a substrate; and
at least two active layer structures,
wherein the at least two active layer structures include a first active layer structure and a second active layer structure,
the first active layer structure includes a first conductive connection portion and a second conductive connection portion arranged oppositely, and a first oxide semiconductor pattern arranged between the first conductive connection portion and the second conductive connection portion, the first oxide semiconductor pattern is respectively coupled to the first conductive connection portion and the second conductive connection portion,
the second active layer structure includes a third conductive connection portion and a fourth conductive connection portion arranged oppositely, and a second oxide semiconductor pattern arranged between the third conductive connection portion and the fourth conductive connection portion, and the second oxide semiconductor pattern is respectively connected to the third conductive connection portion and the fourth conductive connection portion, and
an orthographic projection of the first oxide semiconductor pattern on the substrate and an orthographic projection of the second oxide semiconductor pattern on the substrate are both located within an orthographic projection of the gate electrode on the substrate, the second conductive connection portion is coupled to the third conductive connection portion;
wherein an orthographic projection of the first conductive connection portion on the substrate and the orthographic projection of the first oxide semiconductor pattern on the substrate have a first overlapping area;
an orthographic projection of the second conductive connection portion on the substrate and the orthographic projection of the first oxide semiconductor pattern on the substrate have a second overlapping area;
an orthographic projection of the third conductive connection portion on the substrate and the orthographic projection of the second oxide semiconductor pattern on the substrate have a third overlapping area;
an orthographic projection of the fourth conductive connecting portion on the substrate and the orthographic projection of the second oxide semiconductor pattern on the substrate have a fourth overlapping area;
the second overlapping area and the third overlapping area are located between the first overlapping area and the fourth overlapping area;
wherein the oxide thin film transistor further comprises a first lapping portion, and the second conductive connection portion and the third conductive connection portion are coupled to each other through the first lapping portion, and an orthographic projection of the first lapping portion on the substrate does not overlap the orthographic projection of the first oxide semiconductor pattern on the substrate, and does not overlap with the orthographic projection of the second oxide semiconductor pattern on the substrate;
wherein the first oxide semiconductor pattern and the second oxide semiconductor pattern are sequentially arranged along a first direction, and are staggered along a second direction perpendicular to the first direction.

2. The oxide thin film transistor according to claim 1 , wherein an orthographic projection of the first oxide semiconductor pattern in the second direction and an orthographic projection of the second oxide semiconductor pattern in the second direction have a fifth overlapping areas, the second conductive connection portion, the first lapping portion, and the third conductive connection portion are formed as an integrated in-line structure extending along the second direction.

3. The oxide thin film transistor according to claim 2 , wherein a size of the fifth overlapping area in the first direction is the same as a width of the integrated in-line structure in the first direction.

4. The oxide thin film transistor according to claim 1 , wherein the at least two active layer structures extend along a first direction, the first conductive connection portion includes a first portion and a second portion, the first portion extends along a second direction perpendicular to the first direction, the second portion is extended from the first portion along the second direction, an orthographic projection of the first portion on the substrate and the orthographic projection of the first oxide semiconductor pattern on the substrate have the first overlapping area, and an orthographic projection of the second portion on the substrate does not overlap the orthographic projection of the first oxide semiconductor pattern on the substrate,
wherein the first portion and the second portion form an integrated strip structure along the second direction,
wherein a width of the first overlapping area is the same as a width of the integrated strip structure in the first direction.

5. The oxide thin film transistor according to claim 1 , wherein the at least two active layer structures extend along a first direction, the fourth conductive connection portion includes a third portion and a fourth portion, the third portion extends along a second direction perpendicular to the first direction, an orthographic projection of the third portion on the substrate and the orthographic projection of the second oxide semiconductor pattern on the partially overlap to form a fourth overlapping area;
the fourth portion extends along the first direction, an orthographic projection of the fourth portion on the substrate and the orthographic projection of the second oxide semiconductor pattern on the substrate do not overlap, and the fourth portion is coupled to a first end of the third portion, and an orthographic projection of the first end on the substrate and the orthographic projection of the second oxide semiconductor pattern on the substrate do not overlap.

6. The oxide thin film transistor according to claim 5 , wherein the third portion includes a first sub-portion and a second sub-portion, an orthographic projection of the first sub-portion on the substrate and the orthographic projection of the second oxide semiconductor pattern on the substrate have the fourth overlapping area, an orthographic projection of the second sub-portion on the substrate and the orthographic projection of the second oxide semiconductor pattern on the substrate do not overlap,
wherein the third portion and the fourth portion are collectively formed as an L-shaped pattern or a T-shaped pattern, or
wherein a width of the fourth overlapping region is the same as a width of the third portion in the first direction, or
wherein the third portion and the fourth portion are formed as an integral structure.

7. The oxide thin film transistor according to claim 1 , wherein the first oxide semiconductor pattern and the second oxide semiconductor pattern are arranged at a same layer and made of a same material; or
wherein the first conductive connection portion, the second conductive connection portion, the third conductive connection portion, and the fourth conductive connection portion are arranged at a same layer and made of a same material.

Assignees

• Wuhan Boe Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Shao Xibin
• Liao Yanping
• Guo Huibin

Classifications

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10D30/6729

  characterised by the electrodes · CPC title