Crystalline bottom electrode for perovskite capacitors and methods of fabrication

Patent metadata

Field	Value
Publication number	US-12100731-B2
Application number	US-202016914161-A
Country	US
Kind code	B2
Filing date	Jun 26, 2020
Priority date	Jun 26, 2020
Publication date	Sep 24, 2024
Grant date	Sep 24, 2024

Abstract

A capacitor device, such as a metal insulator metal (MIM) capacitor includes a seed layer including tantalum, a first electrode on the seed layer, where the first electrode includes at least one of ruthenium or iridium and an insulator layer on the seed layer, where the insulator layer includes oxygen and one or more of Sr, Ba or Ti. In an exemplary embodiment, the insulator layer is a crystallized layer having a substantially smooth surface. A crystallized insulator layer having a substantially smooth surface facilitates low electrical leakage in the MIM capacitor. The capacitor device further includes a second electrode layer on the insulator layer, where the second electrode layer includes a second metal or a second metal alloy.

First claim

What is claimed is:

1. A metal insulator metal (MIM) capacitor comprising:
a tantalum layer;
a first electrode material on the tantalum layer, the first electrode material comprising at least one of ruthenium or iridium;
an insulator layer comprising oxygen over the first electrode material, the insulator layer comprising one or more of Sr, Ba or Ti; and
a second electrode material over the insulator layer.

2. The MIM capacitor of claim 1 , wherein the tantalum layer has a thickness between 1 nm and 10 nm and wherein the tantalum layer is crystalline or amorphous.

3. The MIM capacitor of claim 1 , wherein the insulator layer comprises oxygen, Sr and Ti.

4. The MIM capacitor of claim 1 , wherein the insulator layer comprises oxygen, Ba and Ti.

5. The MIM capacitor of claim 1 , wherein the insulator layer comprises oxygen, Sr, Ba and Ti, wherein the insulator layer has a chemical composition, Ba x Sr 1-x TiO 3 and wherein X is less than 95 and greater than 5.

6. The MIM capacitor of claim 1 , wherein the insulator layer has a thickness between 5 nm and 50 nm.

7. The MIM capacitor of claim 1 , wherein the first electrode material comprises ruthenium.

8. The MIM capacitor of claim 1 , wherein the first electrode material comprises iridium.

9. The MIM capacitor of claim 1 , wherein the first electrode material is in a first electrode structure and wherein the first electrode structure comprises a first electrode material layer comprising one of iridium or ruthenium and a second electrode material layer on the first electrode material layer, the second electrode material layer comprising the other of ruthenium or iridium.

10. The MIM capacitor of claim 1 , wherein the first electrode material is in a first electrode structure, and wherein the first electrode structure comprises a first electrode material layer comprising ruthenium and a second electrode material layer comprising iridium on the first electrode material layer.

11. The MIM capacitor of claim 10 , wherein the first electrode material layer has a thickness between 2.5 nm-20 nm, and the second electrode material layer has a thickness between 2.5 nm-20 nm, wherein the total combined thickness of the first electrode material layer and the second electrode material layer is between 5 nm and 50 nm.

12. The MIM capacitor of claim 1 , wherein the first electrode material comprises ruthenium and has a root mean square thickness variation of an uppermost surface that is between 0.3 nm and 1.5 nm.

13. A stacked metal insulator metal (MIM) capacitor structure comprising:
a first capacitor comprising:
a first seed layer comprising tantalum;
a first electrode on the seed layer, the first electrode comprising at least one of ruthenium or iridium;
a first insulator layer comprising oxygen on the first electrode, the first insulator layer comprising one or more of Sr, Ba or Ti; and
a second electrode on the insulator layer;

second capacitor above and coupled with the first capacitor, the second capacitor comprising:
a second seed layer comprising tantalum;
a third electrode structure on the second seed layer, the third electrode structure comprising:
a layer of iridium; and
a layer of ruthenium on the layer of iridium;

a second insulator layer comprising oxygen on the third electrode structure, the second insulator layer comprising one or more of Sr, Ba or Ti; and
a fourth electrode on the second insulator layer; and

an interconnect structure between and in contact with each of the second seed layer and the second electrode.

14. The stacked MIM capacitor structure of claim 13 , wherein at least one of the first seed layer or the second seed layer is Ta of a thickness between 1 nm and 10 nm.

15. The stacked MIM capacitor structure of claim 13 , wherein at least one of the first insulator layer or the second insulator layer comprises oxygen, Sr and Ti.

16. The stacked MIM capacitor structure of claim 13 , wherein at least one of the first insulator layer or the second insulator layer comprises oxygen, Ba and Ti.

17. The stacked MIM capacitor structure of claim 13 , wherein at least one of the first insulator layer or the second insulator layer comprises oxygen, Sr, Ba and Ti, wherein at least one of the first insulator layer or the second insulator layer has a chemical composition, Ba x Sr 1-x TiO 3 wherein X is less than 95 and greater than 5, and wherein at least one of the first insulator layer or the second insulator layer has a thickness between 5 nm and 50 nm.

18. The stacked MIM capacitor structure of claim 13 , wherein the first electrode comprises ruthenium or iridium.

19. A system comprising:
a processor;
a radio transceiver coupled to the processor, wherein the transceiver includes a transistor comprising:
a drain contact coupled to a drain;
a source contact coupled to a source; and
a gate contact coupled to a gate; and

a metal insulator metal (MIM) capacitor coupled to a source or a drain of the transistor, the MIM capacitor comprising:
a seed layer comprising tantalum;
a first electrode on the seed layer, the first electrode comprising at least one of ruthenium or iridium;
an insulator layer comprising oxygen on the first electrode, the insulator layer comprising one or more of Sr, Ba or Ti; and
a second electrode on the insulator layer.

20. The system of claim 19 , further comprises a battery and an antenna coupled with the transistor.

Assignees

• Intel Corp

Inventors

• Oguz Kaan
• Tung I-Cheng
• Lin Chia-Ching
• Chang Sou-Chi
• Metz Matthew
• Avci Uygar

Classifications

• H10D84/811

  Combinations of field-effect devices and one or more diodes, capacitors or resistors · CPC title

• H10D1/682 Primary

  having dielectrics comprising perovskite structures · CPC title

• H10D1/696

  comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688) · CPC title

• H10D1/694 Primary

  comprising noble metals or noble metal oxides · CPC title

• H01L28/55

  Electricity · mapped topic