Conductive members for die attach in flip chip packages

Patent metadata

Field	Value
Publication number	US-12100678-B2
Application number	US-201916669070-A
Country	US
Kind code	B2
Filing date	Oct 30, 2019
Priority date	Oct 30, 2019
Publication date	Sep 24, 2024
Grant date	Sep 24, 2024

Abstract

In examples, a semiconductor package comprises a semiconductor die having an active surface; a conductive layer coupled to the active surface; and a polyimide layer coupled to the conductive layer. The package also comprises a conductive pillar coupled to the conductive layer and to the polyimide layer; a flux adhesive material coupled to the conductive pillar; and a solder layer coupled to the flux adhesive material. The package further includes a conductive terminal coupled to the solder layer and exposed to a surface of the package, the active surface of the semiconductor die facing the conductive terminal.

First claim

What is claimed is:

1. A semiconductor package, comprising:
a semiconductor die having a first surface;
a conductive layer coupled to the first surface;
a polyimide layer coupled to the conductive layer, wherein a second surface of the polyimide layer extends farther away from the first surface of the semiconductor die than does the conductive layer, and wherein the polyimide layer includes an orifice with a sloped sidewall extended from the second surface of the polyimide layer to the conductive layer;
a solder layer coupled to the conductive layer and the polyimide layer;
a conductive sphere coupled to the solder layer; and
a conductive terminal coupled to the solder layer and exposed to a surface of the semiconductor package, the first surface of the semiconductor die facing the conductive terminal, wherein the solder layer includes:
a first portion extending from the second surface of the polyimide layer toward the conductive terminal, wherein the first portion has a first circumference;
a second portion connecting the first portion to the conductive terminal, wherein the second portion has successively increasing circumferences that are each greater than the first circumference; and
a third portion connected to the first portion and extended to a flux adhesive material disposed within the orifice, the flux adhesive material connecting the third portion to the conductive layer, wherein the third portion has successively decreasing circumferences that are each less than the first circumference.

2. The semiconductor package of claim 1 , wherein the conductive sphere has a diameter of 60 microns or less.

3. The semiconductor package of claim 1 , wherein the conductive sphere comprises copper.

4. The semiconductor package of claim 1 , further comprising a package molding abutting the solder layer, the conductive sphere physically isolated from the package molding.

5. The semiconductor package of claim 1 , wherein the solder layer has a volume that is approximately equivalent to that of a sphere having a diameter ranging between 60 and 80 microns less a volume of the conductive sphere.

6. The semiconductor package of claim 1 , wherein the orifice has a first area with a first width on the second surface of the polyimide layer and a second area with a second width on the conductive layer, the second width being less than the first width.

7. The semiconductor package of claim 6 , wherein the conductive sphere has a diameter less than the first width and greater than the second width.

8. The semiconductor package of claim 6 , wherein the first area of the orifice is within a footprint of the conductive layer.

9. The semiconductor package of claim 6 , wherein the flux adhesive material is disposed on the second area.

10. The semiconductor package of claim 9 , wherein the flux adhesive material covers a portion of the sloped sidewall adjacent to the conductive layer, and wherein the rest of the sloped sidewall directly abuts the third portion of the solder layer.

11. A semiconductor package, comprising:
a semiconductor die including a first surface with circuitry;
a conductive structure at the first surface, the conductive structure coupled to the circuitry;
a polyimide layer coupled to the conductive structure and to the first surface, wherein a second surface of the polyimide layer extends farther away from the first surface of the semiconductor die than does the conductive structure, and wherein the polyimide layer includes an opening with a sloped sidewall extended from the second surface to the conductive structure;
a solder structure coupled to the conductive structure;
a conductive sphere disposed within the solder structure; and
a conductive terminal of the semiconductor package coupled to the solder structure, wherein
the solder structure includes:
a first portion extending from the second surface of the polyimide layer toward the conductive terminal, wherein the first portion has a first circumference; and
a second portion connecting the first portion to the conductive terminal, wherein the second portion has successively increasing circumferences that are each greater than the first circumference; and
a third portion connected to the first portion and extended to a flux adhesive material disposed within the opening, the flux adhesive material located between the third portion and the conductive structure, wherein the third portion has successively decreasing circumferences that are each less than the first circumference.

12. The semiconductor package of claim 11 , wherein the first surface of the semiconductor die faces toward the conductive terminal.

13. The semiconductor package of claim 11 , further comprising a seed layer between the conductive structure and the first surface of the semiconductor die.

14. The semiconductor package of claim 13 , wherein the seed layer comprises copper or tin-tungsten alloy.

15. The semiconductor package of claim 13 , wherein the conductive structure and the seed layer share a same perimeter.

16. The semiconductor package of claim 13 , wherein the conductive structure is coupled to the circuitry through the seed layer.

17. The semiconductor package of claim 11 , wherein the opening has a first area with a first width on the second surface of the polyimide layer and a second area with a second width on the conductive structure, the second width being less than the first width.

18. The semiconductor package of claim 17 , wherein the conductive sphere has a diameter less than the first width and greater than the second width.

19. The semiconductor package of claim 17 , wherein the first area of the opening is within a footprint of the conductive structure.

20. The semiconductor package of claim 17 , wherein the flux adhesive material is disposed on the second area.

21. The semiconductor package of claim 20 , wherein the flux adhesive material covers a portion of the sloped sidewall adjacent to the conductive structure, and wherein the rest of the sloped sidewall directly contacts the third portion of the solder structure.

22. The semiconductor package of claim 11 , wherein the solder structure has a first width at the second surface of the polyimide layer and a second width at the conductive terminal, the first width being less than the second width.

23. A semiconductor package, comprising:
a semiconductor die including circuitry;
a conductive structure on the semiconductor die, the conductive structure coupled to the circuitry;
a polyimide layer coupled to the conductive structure and to the semiconductor die, wherein the polyimide layer includes an opening extended to the conductive structure;
a solder structure coupled to the conductive structure;
a conductive sphere disposed within the solder structure; and
a conductive terminal of the semiconductor package coupled to the solder structure, wherein the solder structure includes:
a first portion extended from a surface of the polyimide layer toward the conductive terminal, the first portion having a first circumference; and
a second portion connected to the first portion and extended to the conductive terminal, the second portion having successively increasing circumferences that are each greater than the first circumference; and
a third portion connected to the first portion and extended toward the conductive structure, the third portion having successively decreasing circumferences that are each less than the first circumference.

Assignees

• Texas Instruments Inc

Inventors

• Manack Christopher Daniel
• Pavone Salvatore Frank
• Escaño Maricel Fabia
• Guevara Rafael Jose Lizares

Classifications

• H10W72/07236

  Soldering or alloying · CPC title

• H10W72/252

  comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/223

  characterised by the structure of the outermost layers, e.g. multilayered coatings · CPC title

• H10W72/222

  Multilayered bumps, e.g. a coating on top and side surfaces of a bump core · CPC title

• H10W72/29

  Bond pads specially adapted therefor · CPC title