Hot-cold chunks soft-prediction during programming

US12093558B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12093558-B2
Application numberUS-202217751159-A
CountryUS
Kind codeB2
Filing dateMay 23, 2022
Priority dateMay 23, 2022
Publication dateSep 17, 2024
Grant dateSep 17, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure generally relates to estimating when data to be written will be read or re-written prior to actually writing the data to the memory device. The estimating can be used to smartly route the data to the appropriate memory location at the writing stage or to evict the data from a hot memory location to a colder memory location. To perform the estimating, typical traces or data may be used as may the metadata of the data. Separating data according to the data “temperature” (i.e. the expected access time and frequency), and usage to optimize the SLC partition usage has meaningful impact on several storage metrics such as performance and endurance.

First claim

Opening claim text (preview).

What is claimed is: 1. A data storage device, comprising: a memory device, wherein the memory device is non-volatile memory; and a controller coupled to the memory device, wherein the controller is configured to: receive a write command; retrieve data associated with the write command; determine a temperature for the data, wherein the temperature is an indication of how soon the data is to be re-written or read after writing, wherein determining the temperature comprises comparing metadata of the data to metadata of already written data to find similarities therebetween, wherein a metadata comparison provides a prediction of where to store the data such that similar metadata is to be stored in a same location; write the data to the memory device, wherein the writing occurs after the determining and to a location of the memory device based upon the comparing; store logical to physical (L2P) pointer information corresponding to the data in cache, wherein the cache is volatile memory distinct from the memory device; receive another write command; retrieve data associated with the another write command; determine a temperature for the data associated with the another write command; write the data associated with the another write command to the cache; and store L2P pointer information corresponding to the data associated with the another write command in the cache. 2. The data storage device of claim 1 , wherein the temperature is classified as cold, hot, or super-hot, wherein super-hot is expected to be read sooner than hot, and wherein hot is expected to be read sooner than cold. 3. The data storage device of claim 1 , wherein the determining comprises: using traces of data previously written to predict how soon the data is to be re-written or read after the writing. 4. The data storage device of claim 1 , wherein the writing comprises either: writing the data to single level cell (SLC) memory; or writing the data to multi-level cell (MLC) memory. 5. The data storage device of claim 1 , wherein the writing comprises writing the data to volatile memory and also to non-volatile memory. 6. The data storage device of claim 5 , wherein the volatile memory is SRAM and wherein the non-volatile memory is single level cell (SLC) memory. 7. The data storage device of claim 1 , wherein the data comprises a chunk of data sized to a flash memory unit (FMU), block, or jumbo-block size. 8. The data storage device of claim 1 , wherein the determining comprises measuring features of each data chunk of the data and organizing the data in a regression approach.

Assignees

Inventors

Classifications

  • Allocation control and policies · CPC title

  • Improving I/O performance · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

  • Logical to physical mapping or translation of blocks or pages · CPC title

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What does patent US12093558B2 cover?
The present disclosure generally relates to estimating when data to be written will be read or re-written prior to actually writing the data to the memory device. The estimating can be used to smartly route the data to the appropriate memory location at the writing stage or to evict the data from a hot memory location to a colder memory location. To perform the estimating, typical traces or dat…
Who is the assignee on this patent?
Western Digital Tech Inc, Sandisk Technologies Inc
What technology area does this patent fall under?
Primary CPC classification G06F3/0653. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 17 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).