Power supply circuit

Patent metadata

Field	Value
Publication number	US-12088199-B2
Application number	US-202217670136-A
Country	US
Kind code	B2
Filing date	Feb 11, 2022
Priority date	Sep 24, 2021
Publication date	Sep 10, 2024
Grant date	Sep 10, 2024

Abstract

A power supply circuit in an embodiment includes a first transistor that supplies an output based on an input power supply voltage to a load or stops the supply of the output to the load, a second transistor, one end of a current path of which is connected to the gate of the first transistor and another end of the current path of which is connected to a reference potential point, the second transistor being turned on and off according to a level of a gate voltage of the second transistor, a capacitor connected between an input end of the power supply voltage and a gate of the second transistor, and a voltage holding circuit connected between the gate of the second transistor and the reference potential point and configured to hold the gate voltage of the second transistor.

First claim

What is claimed is:

1. A power supply circuit comprising:
a first transistor controlled to be turned on and off according to a control signal supplied to a gate, the first transistor including one end to which a power supply voltage is applied, and another end connected to a load, and being configured to supply an output based on the power supply voltage to the load or stop the supply of the output to the load;
an N-type second transistor, a drain of the second transistor being connected to the gate of the first transistor, a source of the second transistor being connected to a reference potential point, the second transistor being turned on and off according to a level of a gate voltage of the second transistor;
a capacitor connected between the one end of the first transistor to which the power supply voltage is applied and a gate of the second transistor; and
a voltage holding circuit connected between the gate of the second transistor and the reference potential point and configured to hold the gate voltage of the second transistor.

2. The power supply circuit according to claim 1 , wherein the voltage holding circuit holds, based on a voltage transmitted to the gate of the second transistor by the capacitor, a voltage for turning on the second transistor.

3. The power supply circuit according to claim 1 , wherein the voltage holding circuit is configured by one or more diode-connected MOS transistors.

4. The power supply circuit according to claim 1 , wherein the voltage holding circuit is configured by one diode or two or more diodes connected in cascade.

5. The power supply circuit according to claim 1 , wherein the voltage holding circuit is configured by a Zener diode.

6. The power supply circuit according to claim 1 , further comprising a third transistor, one end of a current path of the third transistor being connected to the gate of the second transistor, another end of the current path of the third transistor being connected to the reference potential point, the third transistor being turned on and off according to a level of a gate voltage of the third transistor.

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Teh Chen Kong

Classifications

• G05F1/652 Primary

  using variable impedances in parallel with the load as final control devices · CPC title

• H03K17/08122

  in field-effect transistor switches · CPC title

• H03K17/687

  the devices being field-effect transistors · CPC title

• H02M1/32

  Means for protecting converters other than automatic disconnection · CPC title

• H02M1/0048

  Circuits or arrangements for reducing losses (using snubbers H02M1/34) · CPC title