Adaptive threshold for bad flash memory blocks

Patent metadata

Field	Value
Publication number	US-12087382-B2
Application number	US-201916381581-A
Country	US
Kind code	B2
Filing date	Apr 11, 2019
Priority date	Apr 11, 2019
Publication date	Sep 10, 2024
Grant date	Sep 10, 2024

Abstract

A method of tracking flash memory in a storage system is provided. The method includes initializing a bad blocks threshold value and marking one or more planes or logical unit numbers (LUNs) of flash memory as bad, responsive to determining that bad blocks in the one or more planes or LUNs meet the bad blocks threshold value. The method includes adjusting the bad blocks threshold value, responsive to exceeding a threshold number or rate of retiring planes or LUNs of flash memory, and repeating the marking and the adjusting, with the bad blocks threshold value capped at a maximum threshold value.

First claim

What is claimed is:

1. A method comprising:
initializing a threshold value of an amount of bad blocks;
marking one or more planes or logical unit numbers (LUNs) of flash memory as bad, responsive to determining that an amount of bad blocks in the one or more planes or LUNs meets the threshold value;
determining that a number of planes or LUNs marked as bad exceeds a threshold number of bad planes or LUNs; and
in response to determining that the number of planes or LUNs marked as bad exceeds the threshold number of bad planes or LUNs, adjusting the threshold value of the amount of bad blocks.

2. The method of claim 1 , further comprising:
performing the marking, adjusting and repeating with a separate threshold value for each of a plurality of flash drives.

3. The method of claim 1 , further comprising:
performing the marking, adjusting and repeating with a separate threshold value for each of a plurality of types of flash memory.

4. The method of claim 1 , wherein the determining that the amount of bad blocks in the one or more planes or LUNS meets the threshold value is based on separate weights for each of a plurality of types of failure.

5. The method of claim 1 , further comprising:
adjusting each of a plurality of weights for types of failure, based on number of program erase cycles per one of block, plane or LUN, wherein the plurality of weights for types of failure is used for the determining that the amount of bad blocks in the one or more planes or LUNS meets the threshold value.

6. The method of claim 1 , wherein the maximum threshold value is based on a manufacturer-provided number of bad blocks per flash device divided by a number of planes or LUNS per flash device.

7. The method of claim 1 , wherein an increment for the adjusting is based on an interpolation of amount of memory declared bad relative to a specified maximum amount of memory declared bad.

8. The method of claim 1 , further comprising:
finding one or more bad blocks in a plane of the flash memory;
ceasing writing to the plane of the flash memory;
testing further blocks in the plane of the flash memory; and
determining whether to return to the writing to the plane of the flash memory or to mark the plane as bad, based on the testing.

9. A tangible, non-transitory, computer-readable media having instructions thereupon which, when executed by a processor, cause the processor to perform a method comprising:
setting a threshold value of an amount of bad blocks;
recording that one or more planes or LUNs of flash memory are bad, responsive to determining there is a sufficient amount of bad blocks in the one or more planes or LUNs to meet the threshold value;
determining that a number of planes or LUNs marked as bad exceeds a threshold number of bad planes or LUNs; and
in response to determining that the number of planes or LUNs marked as bad exceeds the threshold number of bad planes or LUNs, increasing the threshold value of the amount of bad blocks.

10. The computer-readable media of claim 9 , wherein the method further comprises:
performing the recording, increasing and repeating, using a first threshold value of an amount of bad blocks for a first flash drive and a second threshold for a second flash drive.

11. The computer-readable media of claim 9 , further comprising:
performing the recording, increasing and repeating, using a first threshold value of an amount of bad blocks for a first type of flash memory and a second threshold for a second type of flash memory.

12. The computer-readable media of claim 9 , wherein to determine there is a sufficient amount of bad blocks in the one or more planes or LUNS to meet the threshold value, the method comprises using a first weight for a first type of failure and a second weight for a second type of failure.

13. The computer-readable media of claim 9 , wherein the method further comprises:
adjusting a first weight for a first type of failure and a second weight for a second type of failure, based on number of program erase cycles per one of a block, plane or LUN, wherein the determining there is a sufficient amount of bad blocks in the one or more planes or LUNS to meet the threshold value uses the first weight and the second weight for failures of blocks.

14. The computer-readable media of claim 9 , wherein the method further comprises:
determining that there are one or more bad blocks in a plane of the flash memory;
ceasing writing to the plane of the flash memory;
testing further blocks in the plane of the flash memory; and
determining whether to resume the writing to the plane of the flash memory or to record that the plane is bad, based on the testing.

15. A storage system, comprising:
flash memory; and
one or more processors, to:
initialize a threshold value of an amount of bad blocks;

 record that one or more planes or LUNs of flash memory are bad, responsive to determining there is a sufficient amount of bad blocks in the one or more planes or LUNs to meet the threshold value;
determine that a number of planes or LUNs marked as bad exceeds a threshold number of bad planes or LUNs; and
in response to determining that the number of planes or LUNs marked as bad exceeds the threshold number of bad planes or LUNs, adjust the threshold value of the amount of bad blocks towards a maximum threshold value.

16. The storage system of claim 15 , wherein the one or more processors are further to:
iterate such recording and adjusting for each of a plurality of flash drives using separate thresholds.

17. The storage system of claim 15 , further comprising:
iterate such recording and adjusting for each of a plurality of types of flash memory using separate thresholds.

18. The storage system of claim 15 , wherein the one or more processors are to use a plurality of weights for a plurality of types of failure of blocks in the determining there is a sufficient amount of bad blocks to meet the threshold value.

19. The storage system of claim 15 , wherein the one or more processors are further to:
adjust a plurality of weights for a plurality of types of failure of blocks, based on number of program erase cycles per block, plane or LUN, wherein the plurality of weights are to be used in the determining there is a sufficient amount of bad blocks in the one or more planes or LUNS to meet the threshold value.

20. The storage system of claim 15 , wherein the one or more processors are further to:
determine that there are one or more bad blocks in a plane of the flash memory;
stop writing to the plane of the flash memory;
test further blocks in the plane of the flash memory; and
determine whether to resume the writing to the plane of the flash memory or to record that the plane is bad, based on the testing.

Assignees

• Pure Storage Inc

Inventors

• Fleming Matthew D
• Roper John
• Kannan Hari
• Boyle John
• Verwillow Eric Michael
• Miladinovic Nenad
• Mueller Eric

Classifications

• G11C29/38

  Response verification devices · CPC title

• G11C29/028

  with adaption or trimming of parameters · CPC title

• G11C29/702

  by replacing auxiliary circuits, e.g. spare voltage generators, decoders or sense amplifiers, to be used instead of defective ones · CPC title

• G11C2029/4402

  Internal storage of test result, quality data, chip identification, repair information · CPC title

• G11C2029/0409

  Online test · CPC title