Optical coherent receiver on a chip

US12081276B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12081276-B2
Application numberUS-202017133360-A
CountryUS
Kind codeB2
Filing dateDec 23, 2020
Priority dateJun 19, 2020
Publication dateSep 3, 2024
Grant dateSep 3, 2024

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Embodiments described herein may be related to apparatuses, processes, and techniques related to coherent optical receivers, including coherent receivers with integrated all-silicon waveguide photodetectors and tunable local oscillators implemented within CMOS technology. Embodiments are also directed to tunable silicon hybrid lasers with integrated temperature sensors to control wavelength. Embodiments are also directed to post-process phase correction of optical hybrid and nested I/Q modulators. Embodiments are also directed to demultiplexing photodetectors based on multiple microrings. In embodiments, all components may be implements on a silicon substrate. Other embodiments may be described and/or claimed.

First claim

Opening claim text (preview).

What is claimed is: 1. An optical coherent receiver on a chip comprising: an optical amplifier on the chip, wherein the optical amplifier is to receive an optical signal and to generate an amplified signal based on the received optical signal; a local oscillator (LO) on the chip, wherein the LO is to generate an LO optical signal; an optical 90° hybrid on the chip, wherein the optical 90° hybrid is optically coupled with the optical amplifier and the LO on the chip, and wherein the optical 90° hybrid is to receive the amplified signal and the LO optical signal, and to output a tuned optical signal; and a silicon waveguide photodetector (SiPD) on the chip, wherein the SiPD is optically coupled with the optical hybrid on the chip, and wherein the SiPD is to detect data on the tuned optical signal. 2. The optical coherent receiver of claim 1 , wherein the chip is an integrated silicon photonics chip. 3. The optical coherent receiver of claim 1 , further comprising an interconnect to electrically couple with the photodetector to receive detected data. 4. The optical coherent receiver of claim 1 , wherein the LO generator output is tunable. 5. The optical coherent receiver of claim 1 , wherein the optical amplifier is a silicon-based optical amplifier. 6. The optical coherent receiver of claim 1 , wherein the SiPD operates at 64 gigabits per second (Gb/s). 7. A method of forming an optical coherent receiver on an integrated silicon photonics chip, the method comprising: forming, based on a complimentary metal-oxide semiconductor (CMOS) process, an optical amplifier on a silicon substrate of the integrated silicon photonics chip, wherein the optical amplifier is configured to receive a light beam into the optical amplifier to generate an amplified light beam; forming, based on the CMOS process, a local oscillator (LO) on the silicon substrate of the integrated silicon photonics chip, wherein the LO is configured to generate an LO optical signal; forming, based on the CMOS process, an 90° hybrid on the silicon substrate of the integrated silicon photonics chip, wherein the optical 90° hybrid is configured to generate, based on the amplified light beam and the LO optical signal, a tuned optical signal; and forming, based on the CMOS process, a silicon-waveguide photodetector (SiPD) on the silicon substrate of the integrated silicon photonics chip, wherein the SiPD is configured to detect data on the tuned optical signal. 8. The method of claim 7 , further comprising receiving the detected data by an interconnect coupled with the SiPD. 9. The method of claim 8 , wherein the interconnect is a selected one of: an interconnect bridge, an embedded multi-die interconnect bridge (EMIB), a silicon interposer, an open cavity bridge, organic routing on substrate, or a redistribution layer (RDL) on a substrate. 10. The method of claim 7 , wherein the optical 90° hybrid is a silicon hybrid. 11. The method of claim 7 , wherein the optical amplifier is a silicon-based optical amplifier. 12. The method of claim 7 , wherein the SiPD operates at 64 gigabits per second (Gb/s). 13. A system comprising: an optical coherent receiver on a chip, wherein the optical coherent receiver on the chip includes: an optical amplifier on the chip, wherein the optical amplifier is configured to receive an optical signal and to generate an amplified signal based on the received optical signal; a local oscillator (LO) on the chip, wherein the LO is configured to generate an LO optical signal; an optical 90° hybrid on the chip, wherein the optical 90° hybrid is optically coupled with the optical amplifier and the LO, and wherein the 90° hybrid is configured to output a tuned optical signal based on the amplified signal and the LO optical signal; and a silicon waveguide photodetector (SiPD) on the chip, wherein the SiPD is optically coupled with the optical hybrid and configured to detect data on the tuned optical signal; an electrical interface coupled with the SiPD, wherein the electrical interface is configured to route the detected data to another component; and wherein the optical amplifier, the LO, and the 90° hybrid are silicon-based components. 14. The system of claim 13 , further comprising one or more optical fibers to optically couple with the optical amplifier. 15. The system of claim 13 , wherein the chip includes a silicon substrate.

Assignees

Inventors

Classifications

  • for optical signals modulated with a format different from binary or higher-order PSK [X-PSK], e.g. QAM, DPSK, FSK, MSK, ASK · CPC title

  • Estimation or correction of the frequency offset between the received optical signal and the optical local oscillator · CPC title

  • Estimation of the phase of the received optical signal, phase error estimation or phase error correction · CPC title

  • H04B10/614Primary

    comprising one or more polarization beam splitters, e.g. polarization multiplexed [PolMux] X-PSK coherent receivers, polarization diversity heterodyne coherent receivers (H04J14/06 takes precedence) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12081276B2 cover?
Embodiments described herein may be related to apparatuses, processes, and techniques related to coherent optical receivers, including coherent receivers with integrated all-silicon waveguide photodetectors and tunable local oscillators implemented within CMOS technology. Embodiments are also directed to tunable silicon hybrid lasers with integrated temperature sensors to control wavelength. Em…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H04B10/6165. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 03 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).