Magnetic memory devices and methods of formation

US12075628B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12075628-B2
Application numberUS-202017423435-A
CountryUS
Kind codeB2
Filing dateJan 16, 2020
Priority dateFeb 15, 2019
Publication dateAug 27, 2024
Grant dateAug 27, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Implementations of the present disclosure generally relate to a memory device. More specifically, implementations described herein generally relate to a SOT-MRAM. The SOT-MRAM includes a memory cell having a magnetic storage layer disposed side by side and in contact with a SOT layer. The side by side magnetic storage layer and the SOT layer can achieve the switching of the magnetic storage layer by reversing the direction of the electrical current flowing through the SOT layer without any additional conditions.

First claim

Opening claim text (preview).

What is claimed is: 1. A memory device, comprising: a spin-orbit torque magnetoresistive random-access memory cell, comprising: a magnetic storage layer; a first lead disposed side by side and in contact with the magnetic storage layer; a barrier layer disposed in contact with both the first lead and the magnetic storage layer; and a substrate disposed below and in contact with each of the magnetic storage layer and the first lead. 2. The memory device of claim 1 , wherein the magnetic storage layer comprises Co, Fe, Ni, or combinations thereof. 3. The memory device of claim 1 , wherein the first lead comprises platinum, tantalum, tungsten, palladium, iridium, or a metal alloy comprising platinum, tantalum, tungsten, palladium, molybdenum, copper, gold, silver, ruthenium, iridium, manganese, bismuth, antimony, tellurium, hafnium, magnesium, or selenium. 4. The memory device of claim 1 , wherein the first lead comprises a first surface and a second surface substantially perpendicular to the first surface, and the first surface is configured to face a second lead. 5. The memory device of claim 4 , wherein the magnetic storage layer comprises a first surface and a second surface substantially perpendicular to the first surface. 6. The memory device of claim 5 , wherein the first surface of the magnetic storage layer is configured to face the second lead, and the second surface of the magnetic storage layer is in contact with the second surface of the first lead. 7. A memory device, comprising: a spin-orbit torque magnetoresistive random-access memory cell, comprising: a contact; a magnetic reference layer disposed on the contact; a barrier layer having a bottom surface in contact with the magnetic reference layer a magnetic storage layer disposed on the barrier layer; a lead disposed side by side and in contact with the magnetic storage layer, wherein the bottom surface of the barrier layer is in contact with the lead; and a substrate disposed below and in contact with each of the magnetic storage layer and the lead. 8. The memory device of claim 7 , wherein the magnetic storage layer and the magnetic reference layer each comprises Co, Fe, Ni, or combinations thereof. 9. The memory device of claim 7 , wherein the lead comprises platinum, tantalum, tungsten, palladium, iridium, or a metal alloy comprising platinum, tantalum, tungsten, palladium, molybdenum, copper, gold, silver, ruthenium, iridium, manganese, bismuth, antimony, tellurium, hafnium, magnesium, or selenium. 10. The memory device of claim 7 , wherein the barrier layer comprises MgO, HfO 2 , TiO 2 , Ta 2 O 5 , or Al 2 O 3 . 11. The memory device of claim 7 , wherein the barrier layer comprises copper or silver. 12. The memory device of claim 7 , wherein the lead comprises a first surface facing the contact and a second surface connected to the first surface. 13. The memory device of claim 12 , wherein the magnetic storage layer comprises a first surface facing the contact and a second surface connected to the first surface. 14. The memory device of claim 13 , wherein the second surface of the magnetic storage layer is in contact with the second surface of the lead. 15. The memory device of claim 13 , wherein the second surface of the magnetic storage layer is in contact with the second surface of the lead. 16. A memory device, comprising: a spin-orbit torque magnetoresistive random-access memory cell, comprising: a first lead; a magnetic storage layer disposed side by side and in contact with the first lead; a barrier layer disposed in contact with the first lead and the magnetic storage layer; a magnetic reference layer disposed on the barrier layer; a second lead disposed on the magnetic reference layer; and a substrate disposed below and in contact with each of the magnetic storage layer and the first lead. 17. The memory device of claim 16 , wherein the magnetic storage layer and the magnetic reference layer each comprises Co, Fe, Ni, or combinations thereof. 18. The memory device of claim 16 , wherein the first lead comprises platinum, tantalum, tungsten, palladium, iridium, or a metal alloy comprising platinum, tantalum, tungsten, palladium, molybdenum, copper, gold, silver, ruthenium, iridium, manganese, bismuth, antimony, tellurium, hafnium, magnesium, or selenium. 19. The memory device of claim 16 , wherein the barrier layer comprises MgO, HfO 2 , TiO 2 , Ta 2 O 5 , or Al 2 O 3 . 20. The memory device of claim 16 , wherein the barrier layer comprises copper or silver.

Assignees

Inventors

Classifications

  • using Hall-effect devices · CPC title

  • G11C11/161Primary

    details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

  • H10B61/00Primary

    Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices · CPC title

  • Manufacture or treatment · CPC title

  • Materials of the active region · CPC title

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Frequently asked questions

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What does patent US12075628B2 cover?
Implementations of the present disclosure generally relate to a memory device. More specifically, implementations described herein generally relate to a SOT-MRAM. The SOT-MRAM includes a memory cell having a magnetic storage layer disposed side by side and in contact with a SOT layer. The side by side magnetic storage layer and the SOT layer can achieve the switching of the magnetic storage lay…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification G11C11/161. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 27 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).