Display device and tiled display device including the same

US12074170B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12074170-B2
Application numberUS-202117451028-A
CountryUS
Kind codeB2
Filing dateOct 15, 2021
Priority dateDec 2, 2020
Publication dateAug 27, 2024
Grant dateAug 27, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A tiled display device includes a plurality of display devices including a plurality of display areas including pixels, and a coupling area between adjacent display areas from among the plurality of display areas. Each of the plurality of display devices includes: a substrate including a first portion configured to support the display area, a second portion extending from the first portion to be bent, and a third portion extending from the second portion, a display layer on the first portion of the substrate and including the pixels, a connection line at an edge of the first portion of the substrate and connected to the plurality of pixels, a pad portion on the third portion of the substrate, a fan-out line on the second portion of the substrate and connected between the pad portion and the connection line, and pattern holes penetrating the second portion of the substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A tiled display device comprising: a plurality of display devices comprising a plurality of display areas comprising a plurality of pixels, and a coupling area between adjacent display areas from among the plurality of display areas, wherein each of the plurality of display devices comprises: a substrate comprising a first portion configured to support the display area, a second portion extending from the first portion to be bent, and a third portion extending from the second portion; a thin film transistor layer on the first portion, the second portion, and the third portion of the substrate and comprising a thin film transistor; a display layer comprising the thin film transistor on the first portion of the substrate, and the plurality of pixels; a connection line at an edge of the first portion of the substrate and connected to the plurality of pixels; a pad portion on the third portion of the substrate; a fan-out line on the second portion of the substrate and connected between the pad portion and the connection line; and a plurality of pattern holes penetrating the thin film transistor layer and the second portion of the substrate. 2. The tiled display device of claim 1 , wherein the second portion of the substrate of each of the plurality of display devices is at the coupling area. 3. The tiled display device of claim 1 , wherein the third portion of the substrate overlaps the first portion of the substrate in a thickness direction of the substrate. 4. The tiled display device of claim 1 , wherein each of the plurality of display devices further comprises: a flexible film on the pad portion; and a source driver on the flexible film to drive the plurality of pixels. 5. The tiled display device of claim 1 , wherein the fan-out line is bent to bypass the plurality of pattern holes in a plan view. 6. The tiled display device of claim 1 , wherein the second portion of the substrate is bent along a bending axis in a first direction, and a width of each of the plurality of pattern holes in the first direction is greater than a width of each of the plurality of pattern holes in a second direction crossing the first direction. 7. The tiled display device of claim 1 , wherein the plurality of pattern holes have a circular shape. 8. The tiled display device of claim 1 , wherein each of the plurality of display devices further comprises a protective film covering the fan-out line. 9. The tiled display device of claim 1 , wherein a thickness of the second portion of the substrate is less than a thickness of the first portion of the substrate or a thickness of the third portion of the substrate. 10. The tiled display device of claim 9 , wherein a bottom surface of the second portion of the substrate has a stepped portion recessed from a bottom surface of the first portion of the substrate. 11. The tiled display device of claim 10 , wherein each of the plurality of display devices further comprises a support part configured to support the second portion of the substrate and to attach one surface of the third portion of the substrate to one surface of the first portion of the substrate. 12. The tiled display device of claim 9 , wherein a top surface of the second portion of the substrate has a stepped portion recessed from a top surface of the first portion of the substrate. 13. The tiled display device of claim 1 , wherein each of the plurality of display devices further comprises a filling part filled in the plurality of pattern holes. 14. The tiled display device of claim 13 , wherein the fan-out line extends on a top surface of the filling part. 15. The tiled display device of claim 1 , wherein the second portion of the substrate comprises: a second-first portion extending from the first portion of the substrate to be bent; a second-second portion extending from the second-first portion; and a second-third portion extending from the second-second portion to be bent, and wherein the plurality of pattern holes are configured to penetrate the second-first portion and the second-third portion. 16. A display device comprising: a substrate comprising a first portion, a second portion extending from the first portion to be bent, and a third portion extending from the second portion; a thin film transistor layer on the first portion, the second portion, and the third portion of the substrate and comprising a thin film transistor; a light emitting element layer on the thin film transistor layer on the first portion of the substrate and comprising a light emitting element connected to the thin film transistor; a wavelength conversion layer on the light emitting element layer to convert a peak wavelength of light provided from the light emitting element; a connection line at an edge on the first portion of the substrate and connected to the thin film transistor; a pad portion on the third portion of the substrate; a fan-out line on the second portion of the substrate and connected between the pad portion and the connection line; and a plurality of pattern holes penetrating the thin film transistor layer and the second portion of the substrate. 17. The display device of claim 16 , wherein the light emitting element layer comprises: a first electrode on the thin film transistor layer; a second electrode at a same layer as the first electrode and spaced from the first electrode; and a light emitting diode located between the first electrode and the second electrode. 18. The display device of claim 16 , wherein the wavelength conversion layer comprises: a first wavelength conversion part configured to convert the peak wavelength of light provided from the light emitting element into a first peak wavelength; a second wavelength conversion part configured to convert the peak wavelength of light provided from the light emitting element into a second peak wavelength different from the first peak wavelength; and a light transmission part configured to allow the light to pass therethrough while maintaining the peak wavelength of the light provided from the light emitting element. 19. The display device of claim 16 , wherein a thickness of the second portion of the substrate is less than a thickness of the first portion of the substrate or a thickness of the third portion of the substrate. 20. The display device of claim 19 , wherein a bottom surface of the second portion of the substrate has a stepped portion recessed from a bottom surface of the first portion of the substrate. 21. The display device of claim 20 , further comprising a support part configured to support the second portion of the substrate and to attach one surface of the third portion of the substrate to one surface of the first portion of the substrate. 22. The display device of claim 19 , wherein a top surface of the second portion of the substrate has a stepped portion recessed from a top surface of the first portion of the substrate. 23. The display device of claim 16 , further comprising a filling part filled in the plurality of pattern holes, wherein the fan-out line extends on a top surface of the filling part.

Assignees

Inventors

Classifications

  • H10W90/00Primary

    Package configurations · CPC title

  • Wavelength conversion means · CPC title

  • Interconnections, e.g. scanning lines · CPC title

  • characterised by materials, geometry or structure of the substrates · CPC title

  • H10D86/60Primary

    wherein the TFTs are in active matrices · CPC title

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What does patent US12074170B2 cover?
A tiled display device includes a plurality of display devices including a plurality of display areas including pixels, and a coupling area between adjacent display areas from among the plurality of display areas. Each of the plurality of display devices includes: a substrate including a first portion configured to support the display area, a second portion extending from the first portion to b…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 27 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).