Load line circuit and electronic device

Patent metadata

Field	Value
Publication number	US-12068673-B2
Application number	US-202217743237-A
Country	US
Kind code	B2
Filing date	May 12, 2022
Priority date	Nov 14, 2019
Publication date	Aug 20, 2024
Grant date	Aug 20, 2024

Abstract

This application provides a load line circuit and an electronic device, where the load line circuit is applied to the electronic device. A voltage value of a feedback voltage provided by the load line circuit to a switch-mode power supply is linearly and positively correlated with each of a voltage value of a first voltage and a current value of a first current, where the first voltage is a voltage provided to a load circuit, and the first current is a current provided to the load circuit. Through disposition of the load line circuit, the switch-mode power supply can implement a load line function.

First claim

What is claimed is:

1. A load line circuit, comprising;
a first sampling circuit configured to generate a second voltage and provide the second voltage to a feedback circuit, wherein a voltage value of the second voltage is linearly and positively correlated with a voltage value of a first voltage, wherein the first voltage is a voltage provided by a switch-mode power supply to a load circuit, and wherein an output terminal of the first sampling circuit is coupled to a first input terminal of the feedback circuit;
a second sampling circuit configured to generate a regulating voltage and provide the regulating voltage to the feedback circuit, wherein a voltage value of the regulating voltage is linearly and positively correlated with a current value of a first current, wherein the first current is a current provided by the switch-mode power supply to the load circuit, and wherein an output terminal of the second sampling circuit is coupled to a second input terminal of the feedback circuit; and
the feedback circuit configured to generate a feedback voltage based on the second voltage and the regulating voltage, and feed back the feedback voltage to the switch-mode power supply, wherein a voltage value of the feedback voltage is linearly and positively correlated with each of the voltage value of the second voltage and the voltage value of the regulating voltage, and wherein an output terminal of the feedback circuit is configured to be coupled to the switch-mode power supply.

2. The load line circuit according to claim 1 , wherein the first sampling circuit comprises a resistor R 1 , a resistor R 2 , a resistor R 3 , a resistor R 4 , and a first differential amplifier, wherein
wherein a first end of the resistor R 1 is configured to be coupled to a negative input terminal of the load circuit, and a second end of the resistor R 1 is coupled to a negative input terminal of the first differential amplifier;
wherein a first end of the resistor R 3 is coupled to the negative input terminal of the first differential amplifier, and a second end of the resistor R 3 is coupled to an output terminal of the first differential amplifier;
wherein a first end of the resistor R 2 is configured to be coupled to a positive input terminal of the load circuit, a second end of the resistor R 2 is configured to be coupled to a positive output terminal of the switch-mode power supply, and a third end of the resistor R 2 is coupled to a positive input terminal of the first differential amplifier; and
wherein a first end of the resistor R 4 is coupled to the positive input terminal of the first differential amplifier, and a second end of the resistor R 4 is coupled to a grounding circuit.

3. The load line circuit according to claim 2 , wherein a resistance value of the resistor R 1 is the same as a resistance value of the resistor R 2 , and a resistance value of the resistor R 3 is the same as a resistance value of the resistor R 4 .

4. The load line circuit according to claim 2 , wherein a resistance value of the resistor R 1 , a resistance value of the resistor R 2 , a resistance value of the resistor R 3 , and a resistance value of the resistor R 4 are the same.

5. The load line circuit according to claim 2 , wherein the first sampling circuit further comprises a first capacitor connected to the resistor R 3 in parallel.

6. The load line circuit according to claim 2 , wherein the first sampling circuit further comprises a second capacitor connected to the resistor R 2 in parallel.

7. The load line circuit according to claim 1 , wherein the second sampling circuit comprises a resistor R 5 , a resistor R 6 , a resistor R 7 , a resistor R 8 , and a second differential amplifier, wherein
a first end of the resistor R 5 is configured to be coupled to a first terminal of a sampling resistor, a second end of the resistor R 5 is coupled to a negative input terminal of the second differential amplifier, and the first terminal of the sampling resistor is coupled to a positive input terminal of the load circuit;
wherein a first end of the resistor R 6 is coupled to the negative input terminal of the second differential amplifier, and a second end of the resistor R 6 is coupled to an output terminal of the second differential amplifier;
wherein a first of the resistor R 7 is configured to be coupled to a second terminal of the sampling resistor, a second end of the resistor R 7 is coupled to a positive input terminal of the second differential amplifier, and the second terminal of the sampling resistor is coupled to a positive output terminal of the switch-mode power supply; and
wherein a first end of the resistor R 8 is coupled to the positive input terminal of the second differential amplifier, and a second end of the resistor R 8 is coupled to a grounding circuit.

8. The load line circuit according to claim 7 , wherein a resistance value of the resistor R 5 is the same as a resistance value of the resistor R 7 , and the resistor R 6 and the resistor R 8 have a same resistance value.

9. The load line circuit according to claim 7 , wherein the second sampling circuit further comprises a resistor R 9 and a third capacitor, a first terminal of the resistor R 9 is coupled to the resistor R 7 , and a second terminal of the resistor R 9 is coupled to the positive input terminal of the second differential amplifier; and
wherein a first end of the third capacitor is coupled to the first terminal of the resistor R 9 , and a second end of the third capacitor is grounded.

10. The load line circuit according to claim 9 , wherein a sum of a resistance value of the resistor R 9 and a resistance value of the resistor R 7 is a resistance value of the resistor R 5 , and the resistor R 6 and the resistor R 8 have a same resistance value.

11. The load line circuit according to claim 9 , wherein there are N transmission paths connected in parallel between the load circuit and the positive output terminal of the switch-mode power supply, wherein the sampling resistor is located in one of the N transmission paths, wherein N is an integer greater than or equal to 1; and
wherein a resistance value of the resistor R 6 is N times of a resistance value of the resistor R 5 .

12. The load line circuit according to claim 1 , wherein the feedback circuit is configured to:
perform additive operational amplifying processing on the second voltage and the regulating voltage to generate the feedback voltage.

13. The load line circuit according to claim 12 , wherein the feedback circuit comprises a resistor R 10 , a resistor R 11 , a resistor R 12 , a resistor R 13 , a resistor R 14 , and a third differential amplifier, wherein
a first end of the resistor R 11 is coupled to the output terminal of the first sampling circuit, a second end of the resistor R 11 is coupled to each of one end of the resistor R 12 and a positive input terminal of the third differential amplifier, and a third end of the resistor R 12 is grounded;
wherein a first end of the resistor R 14 is coupled to the output terminal of the second sampling circuit, and a second end of the resistor R 14 is coupled to the positive input terminal of the third differential amplifier;
wherein a first end of the resistor R 13 is grounded, and a second end of the resistor R 13 is coupled to a negative input terminal of the third differential amplifier; and
wherein a first end of the resistor R 10 is coupled to the negative input terminal of the third differential amplifier, and a second end of the resistor R 10 is coupled to an output terminal of the third differential amplifier.

14. The load lin

Assignees

• Huawei Tech Co Ltd

Inventors

• Wang Xiaokun
• Chen Zhongjian

Classifications

• H02M1/0025 Primary

  Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title

• H02M1/0009

  Devices or circuits for detecting current in a converter · CPC title

• H02M3/10

  using discharge tubes with control electrode or semiconductor devices with control electrode (H02M3/07 takes precedence) · CPC title

• H02M1/0048 Primary

  Circuits or arrangements for reducing losses (using snubbers H02M1/34) · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title